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stage 2 fails currently (#18)
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@hazel-sudz
hazel-sudz authored Jan 11, 2024
1 parent 22c69c0 commit 9213dfc
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79 changes: 79 additions & 0 deletions src/asm/ari_1.s
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# integrated test file courtesy of Ari Bobesh @Olin College of Engineering

addi x1, x0, -1 # x01 = -1
addi x2, x0, 35 # x02 = 35
jalr x27,x1,13
xori x3, x2, 68 # x03 = 103
ori x4, x2, 17 # x04 = 51
andi x5, x2, 17 # x05 = 1
slli x6, x1, 8 # x06 = -256
srli x7, x3, 2 # x07 = 25
srai x8, x6, 6 # x08 = -4
slti x9, x1, 35 # x09 = 1
sltiu x10, x1, 35 # x10 = 0
add x11, x1, x1 # x11 = -2
sub x12, x1, x1 # x12 = 0
xor x13, x1, x12 # x13 = -1
or x14, x2, x3 # x14 = 103
and x15, x2, x3 # x15 = 35
addi x16, x0, 4 # x16 = 4
sll x17, x2, x16 # x17 = 560
srl x18, x3, x16 # x18 = 6
sra x19, x6, x16 # x19 = -16
slt x20, x1, x2 # x20 = 1
sltu x21, x1, x2 # x20 = 0
loop_head:
beq x22, x2, loop_end
addi x22, x22, 1
jal x28, loop_head
loop_end:
addi x29, x29, 420
loop_head2:
addi x23, x23, -1
bne x23, x8, loop_head2
addi x30, x30, 69
lw x31, 24(x0) #8426259
sw x30, 760(x0) #69
lw x26, 776(x19) #69
sw x29, -16(x17) #420
sb x16, 544(x0) #4
lw x25, 544(x0) #260
sh x31, 126(x29) #37651
lw x24, 800(x6) #-1827471100

#TESTASSERTOUTPUT|---------------------------------------|
#TESTASSERTOUTPUT| Register File State :) |
#TESTASSERTOUTPUT|---------------------------------------|
#TESTASSERTOUTPUT| x00, zero = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x01, ra = 0xffffffff ( -1)|
#TESTASSERTOUTPUT| x02, sp = 0x00000023 ( 35)|
#TESTASSERTOUTPUT| x03, gp = 0x00000067 ( 103)|
#TESTASSERTOUTPUT| x04, tp = 0x00000033 ( 51)|
#TESTASSERTOUTPUT| x05, t0 = 0x00000001 ( 1)|
#TESTASSERTOUTPUT| x06, t1 = 0xffffff00 ( -256)|
#TESTASSERTOUTPUT| x07, t2 = 0x00000019 ( 25)|
#TESTASSERTOUTPUT| x08, s0 = 0xfffffffc ( -4)|
#TESTASSERTOUTPUT| x09, s1 = 0x00000001 ( 1)|
#TESTASSERTOUTPUT| x10, a0 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x11, a1 = 0xfffffffe ( -2)|
#TESTASSERTOUTPUT| x12, a2 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x13, a3 = 0xffffffff ( -1)|
#TESTASSERTOUTPUT| x14, a4 = 0x00000067 ( 103)|
#TESTASSERTOUTPUT| x15, a5 = 0x00000023 ( 35)|
#TESTASSERTOUTPUT| x16, a6 = 0x00000004 ( 4)|
#TESTASSERTOUTPUT| x17, a7 = 0x00000230 ( 560)|
#TESTASSERTOUTPUT| x18, s2 = 0x00000006 ( 6)|
#TESTASSERTOUTPUT| x19, s3 = 0xfffffff0 ( -16)|
#TESTASSERTOUTPUT| x20, s4 = 0x00000001 ( 1)|
#TESTASSERTOUTPUT| x21, s5 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x22, s6 = 0x00000023 ( 35)|
#TESTASSERTOUTPUT| x23, s7 = 0xfffffffc ( -4)|
#TESTASSERTOUTPUT| x24, s8 = 0x93130104 (-1827471100)|
#TESTASSERTOUTPUT| x25, s9 = 0x00000104 ( 260)|
#TESTASSERTOUTPUT| x26, s10 = 0x00000045 ( 69)|
#TESTASSERTOUTPUT| x27, s11 = 0x0000000c ( 12)|
#TESTASSERTOUTPUT| x28, t3 = 0x00000064 ( 100)|
#TESTASSERTOUTPUT| x29, t4 = 0x000001a4 ( 420)|
#TESTASSERTOUTPUT| x30, t5 = 0x00000045 ( 69)|
#TESTASSERTOUTPUT| x31, t6 = 0x00809313 ( 8426259)|
#TESTASSERTOUTPUT|---------------------------------------|
44 changes: 2 additions & 42 deletions src/asm/ari.s → src/asm/ari_2.s
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# integrated test file courtesy of Ari Bobesh @Olin College of Engineering

addi x1, x0, -1 # x01 = -1
addi x2, x0, 35 # x02 = 35
jalr x27,x1,13
Expand Down Expand Up @@ -67,48 +69,6 @@ auipc x22, 2048 #8388608+216=8388824
lui x23, 42069 #172314624
nop

# LMAO I CREATED AN UNBOUNDED MEMORY READ BY RUNNING THE PC INTO THE SAVED DATA HAHAHAHA
# LMAO NOW I ENDED UP OVERWRITING AN INSTRUCTION WITH 69 OOPS

#stage 1 testing
|---------------------------------------|
| Register File State |
|---------------------------------------|
| x00, zero = 0x00000000 ( 0)|
| x01, ra = 0xffffffff ( -1)|
| x02, sp = 0x00000023 ( 35)|
| x03, gp = 0x00000067 ( 103)|
| x04, tp = 0x00000033 ( 51)|
| x05, t0 = 0x00000001 ( 1)|
| x06, t1 = 0xffffff00 ( -256)|
| x07, t2 = 0x00000019 ( 25)|
| x08, s0 = 0xfffffffc ( -4)|
| x09, s1 = 0x00000001 ( 1)|
| x10, a0 = 0x00000000 ( 0)|
| x11, a1 = 0xfffffffe ( -2)|
| x12, a2 = 0x00000000 ( 0)|
| x13, a3 = 0xffffffff ( -1)|
| x14, a4 = 0x00000067 ( 103)|
| x15, a5 = 0x00000023 ( 35)|
| x16, a6 = 0x00000004 ( 4)|
| x17, a7 = 0x00000230 ( 560)|
| x18, s2 = 0x00000006 ( 6)|
| x19, s3 = 0xfffffff0 ( -16)|
| x20, s4 = 0x00000001 ( 1)|
| x21, s5 = 0x00000000 ( 0)|
| x22, s6 = 0x00000023 ( 35)| #35 times increment
| x23, s7 = 0xfffffffc ( -4)| #-4 times decrement
| x24, s8 = 0x93130104 (-1827471100)| #sh x31<<16 on top of 260 = -1827471100
| x25, s9 = 0x00000104 ( 260)| #lw sw 420 then sb 4 so it's 260
| x26, s10 = 0x00000045 ( 69)| #add 69
| x27, s11 = 0x0000000c ( 12)| #jalr link 12
| x28, t3 = 0x00000064 ( 100)| #jal link 100
| x29, t4 = 0x000001a4 ( 420)| #add 420
| x30, t5 = 0x00000045 ( 69)| #lw sw 69
| x31, t6 = 0x00809313 ( 8426259)| #lw instruction 24
|---------------------------------------|

#stage 2 testing
|---------------------------------------|
| Register File State |
|---------------------------------------|
Expand Down
37 changes: 37 additions & 0 deletions src/asm/out/ari_1.memh
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fff00093 // PC=0x0 line=1: addi x1, x0, -1 # x01 = -1
02300113 // PC=0x4 line=2: addi x2, x0, 35 # x02 = 35
00d08de7 // PC=0x8 line=3: jalr x27,x1,13
04414193 // PC=0xc line=4: xori x3, x2, 68 # x03 = 103
01116213 // PC=0x10 line=5: ori x4, x2, 17 # x04 = 51
01117293 // PC=0x14 line=6: andi x5, x2, 17 # x05 = 1
00809313 // PC=0x18 line=7: slli x6, x1, 8 # x06 = -256
0021d393 // PC=0x1c line=8: srli x7, x3, 2 # x07 = 25
40635413 // PC=0x20 line=9: srai x8, x6, 6 # x08 = -4
0230a493 // PC=0x24 line=10: slti x9, x1, 35 # x09 = 1
0230b513 // PC=0x28 line=11: sltiu x10, x1, 35 # x10 = 0
001085b3 // PC=0x2c line=12: add x11, x1, x1 # x11 = -2
40108633 // PC=0x30 line=13: sub x12, x1, x1 # x12 = 0
00c0c6b3 // PC=0x34 line=14: xor x13, x1, x12 # x13 = -1
00316733 // PC=0x38 line=15: or x14, x2, x3 # x14 = 103
003177b3 // PC=0x3c line=16: and x15, x2, x3 # x15 = 35
00400813 // PC=0x40 line=17: addi x16, x0, 4 # x16 = 4
010118b3 // PC=0x44 line=18: sll x17, x2, x16 # x17 = 560
0101d933 // PC=0x48 line=19: srl x18, x3, x16 # x18 = 6
410359b3 // PC=0x4c line=20: sra x19, x6, x16 # x19 = -16
0020aa33 // PC=0x50 line=21: slt x20, x1, x2 # x20 = 1
0020bab3 // PC=0x54 line=22: sltu x21, x1, x2 # x20 = 0
002b0663 // PC=0x58 line=24: beq x22, x2, loop_end
001b0b13 // PC=0x5c line=25: addi x22, x22, 1
ff9ffe6f // PC=0x60 line=26: jal x28, loop_head
1a4e8e93 // PC=0x64 line=28: addi x29, x29, 420
fffb8b93 // PC=0x68 line=30: addi x23, x23, -1
fe8b9ee3 // PC=0x6c line=31: bne x23, x8, loop_head2
045f0f13 // PC=0x70 line=32: addi x30, x30, 69
01802f83 // PC=0x74 line=33: lw x31, 24(x0) #8426259
2fe02c23 // PC=0x78 line=34: sw x30, 760(x0) #69
3089ad03 // PC=0x7c line=35: lw x26, 776(x19) #69
ffd8a823 // PC=0x80 line=36: sw x29, -16(x17) #420
23000023 // PC=0x84 line=37: sb x16, 544(x0) #4
22002c83 // PC=0x88 line=38: lw x25, 544(x0) #260
07fe9f23 // PC=0x8c line=39: sh x31, 126(x29) #37651
32032c03 // PC=0x90 line=40: lw x24, 800(x6) #-1827471100
57 changes: 57 additions & 0 deletions src/asm/out/ari_2.memh
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fff00093 // PC=0x0 line=3: addi x1, x0, -1 # x01 = -1
02300113 // PC=0x4 line=4: addi x2, x0, 35 # x02 = 35
00d08de7 // PC=0x8 line=5: jalr x27,x1,13
04414193 // PC=0xc line=6: xori x3, x2, 68 # x03 = 103
01116213 // PC=0x10 line=7: ori x4, x2, 17 # x04 = 51
01117293 // PC=0x14 line=8: andi x5, x2, 17 # x05 = 1
00809313 // PC=0x18 line=9: slli x6, x1, 8 # x06 = -256
0021d393 // PC=0x1c line=10: srli x7, x3, 2 # x07 = 25
40635413 // PC=0x20 line=11: srai x8, x6, 6 # x08 = -4
0230a493 // PC=0x24 line=12: slti x9, x1, 35 # x09 = 1
0230b513 // PC=0x28 line=13: sltiu x10, x1, 35 # x10 = 0
001085b3 // PC=0x2c line=14: add x11, x1, x1 # x11 = -2
40108633 // PC=0x30 line=15: sub x12, x1, x1 # x12 = 0
00c0c6b3 // PC=0x34 line=16: xor x13, x1, x12 # x13 = -1
00316733 // PC=0x38 line=17: or x14, x2, x3 # x14 = 103
003177b3 // PC=0x3c line=18: and x15, x2, x3 # x15 = 35
00400813 // PC=0x40 line=19: addi x16, x0, 4 # x16 = 4
010118b3 // PC=0x44 line=20: sll x17, x2, x16 # x17 = 560
0101d933 // PC=0x48 line=21: srl x18, x3, x16 # x18 = 6
410359b3 // PC=0x4c line=22: sra x19, x6, x16 # x19 = -16
0020aa33 // PC=0x50 line=23: slt x20, x1, x2 # x20 = 1
0020bab3 // PC=0x54 line=24: sltu x21, x1, x2 # x20 = 0
002b0663 // PC=0x58 line=26: beq x22, x2, loop_end
001b0b13 // PC=0x5c line=27: addi x22, x22, 1
ff9ffe6f // PC=0x60 line=28: jal x28, loop_head
1a4e8e93 // PC=0x64 line=30: addi x29, x29, 420
fffb8b93 // PC=0x68 line=32: addi x23, x23, -1
fe8b9ee3 // PC=0x6c line=33: bne x23, x8, loop_head2
045f0f13 // PC=0x70 line=34: addi x30, x30, 69
01802f83 // PC=0x74 line=35: lw x31, 24(x0) #8426259
2fe02c23 // PC=0x78 line=36: sw x30, 760(x0) #69
3089ad03 // PC=0x7c line=37: lw x26, 776(x19) #69
ffd8a823 // PC=0x80 line=38: sw x29, -16(x17) #420
23000023 // PC=0x84 line=39: sb x16, 544(x0) #4
22002c83 // PC=0x88 line=40: lw x25, 544(x0) #260
07fe9f23 // PC=0x8c line=41: sh x31, 126(x29) #37651
32032c03 // PC=0x90 line=42: lw x24, 800(x6) #-1827471100
32330403 // PC=0x94 line=44: lb x8, 803(x6) #-109
32334483 // PC=0x98 line=45: lbu x9, 803(x6) #147
32231503 // PC=0x9c line=46: lh x10, 802(x6) #-27885
32235583 // PC=0xa0 line=47: lhu x11, 802(x6) #37651
00534463 // PC=0xa4 line=49: blt x6, x5, add_one #test -256<1
00160613 // PC=0xa8 line=50: addi x12, x12, 1 #should not run
00537463 // PC=0xac line=52: bgeu x6, x5, add_two #test big_number>1
00260613 // PC=0xb0 line=53: addi x12, x12, 2 #should not run
0179e463 // PC=0xb4 line=55: bltu x19, x23, add_four #test -16<-4
00460613 // PC=0xb8 line=56: addi x12, x12, 4 #should not run
0139d463 // PC=0xbc line=58: bge x19, x19, add_eight #test -16=-16
00860613 // PC=0xc0 line=59: addi x12, x12, 8 #should not run
0089d463 // PC=0xc4 line=61: bge x19, x8, add_sixteen #test -16>-109
01060613 // PC=0xc8 line=62: addi x12, x12, 16 #should not run
00e7e463 // PC=0xcc line=64: bltu x15, x14, add_more #test 35<103
02060613 // PC=0xd0 line=65: addi x12, x12, 32 #should not run
00000a97 // PC=0xd4 line=67: auipc x21, 0
00800b17 // PC=0xd8 line=68: auipc x22, 2048 #8388608+216=8388824
0a455bb7 // PC=0xdc line=69: lui x23, 42069 #172314624
00000013 // PC=0xe0 line=70: nop
50 changes: 50 additions & 0 deletions src/asm/test/ari_1.result
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Usage:
./rv32_simulator +initial_memory=path/to/memh/file
Additional arguments:
+initial_memory=path/to/memh/file
Required: path to a memh file that containes the assembled binary to run.
+max_cycles=NUMBER_OF_CYCLES_TO_RUN
+wave_fn=path/to/wave/file
default is rv32_simulator.fst
+final_memory=path/to/memh/file
If provided, the final memory contents will be saved here. Use this to debug your store instructions.
WARNING: ./tests/provided/bytewise_distributed_ram.sv:58: $readmemh(../asm/out/ari_1.memh): Not enough words in the file for the requested range [0:1023].
Running simulation of memory ../asm/out/ari_1.memh for up to 10000 cycles. Waves will be stored to rv32_simulator.fst.
FST info: dumpfile rv32_simulator.fst opened for output.
Ran 10000 cycles, finishing.
#TESTASSERTOUTPUT|---------------------------------------|
#TESTASSERTOUTPUT| Register File State :) |
#TESTASSERTOUTPUT|---------------------------------------|
#TESTASSERTOUTPUT| x00, zero = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x01, ra = 0xffffffff ( -1)|
#TESTASSERTOUTPUT| x02, sp = 0x00000023 ( 35)|
#TESTASSERTOUTPUT| x03, gp = 0x00000067 ( 103)|
#TESTASSERTOUTPUT| x04, tp = 0x00000033 ( 51)|
#TESTASSERTOUTPUT| x05, t0 = 0x00000001 ( 1)|
#TESTASSERTOUTPUT| x06, t1 = 0xffffff00 ( -256)|
#TESTASSERTOUTPUT| x07, t2 = 0x00000019 ( 25)|
#TESTASSERTOUTPUT| x08, s0 = 0xfffffffc ( -4)|
#TESTASSERTOUTPUT| x09, s1 = 0x00000001 ( 1)|
#TESTASSERTOUTPUT| x10, a0 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x11, a1 = 0xfffffffe ( -2)|
#TESTASSERTOUTPUT| x12, a2 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x13, a3 = 0xffffffff ( -1)|
#TESTASSERTOUTPUT| x14, a4 = 0x00000067 ( 103)|
#TESTASSERTOUTPUT| x15, a5 = 0x00000023 ( 35)|
#TESTASSERTOUTPUT| x16, a6 = 0x00000004 ( 4)|
#TESTASSERTOUTPUT| x17, a7 = 0x00000230 ( 560)|
#TESTASSERTOUTPUT| x18, s2 = 0x00000006 ( 6)|
#TESTASSERTOUTPUT| x19, s3 = 0xfffffff0 ( -16)|
#TESTASSERTOUTPUT| x20, s4 = 0x00000001 ( 1)|
#TESTASSERTOUTPUT| x21, s5 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x22, s6 = 0x00000023 ( 35)|
#TESTASSERTOUTPUT| x23, s7 = 0xfffffffc ( -4)|
#TESTASSERTOUTPUT| x24, s8 = 0x93130104 (-1827471100)|
#TESTASSERTOUTPUT| x25, s9 = 0x00000104 ( 260)|
#TESTASSERTOUTPUT| x26, s10 = 0x00000045 ( 69)|
#TESTASSERTOUTPUT| x27, s11 = 0x0000000c ( 12)|
#TESTASSERTOUTPUT| x28, t3 = 0x00000064 ( 100)|
#TESTASSERTOUTPUT| x29, t4 = 0x000001a4 ( 420)|
#TESTASSERTOUTPUT| x30, t5 = 0x00000045 ( 69)|
#TESTASSERTOUTPUT| x31, t6 = 0x00809313 ( 8426259)|
#TESTASSERTOUTPUT|---------------------------------------|
50 changes: 50 additions & 0 deletions src/asm/test/ari_2.result
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Usage:
./rv32_simulator +initial_memory=path/to/memh/file
Additional arguments:
+initial_memory=path/to/memh/file
Required: path to a memh file that containes the assembled binary to run.
+max_cycles=NUMBER_OF_CYCLES_TO_RUN
+wave_fn=path/to/wave/file
default is rv32_simulator.fst
+final_memory=path/to/memh/file
If provided, the final memory contents will be saved here. Use this to debug your store instructions.
WARNING: ./tests/provided/bytewise_distributed_ram.sv:58: $readmemh(../asm/out/ari_2.memh): Not enough words in the file for the requested range [0:1023].
Running simulation of memory ../asm/out/ari_2.memh for up to 10000 cycles. Waves will be stored to rv32_simulator.fst.
FST info: dumpfile rv32_simulator.fst opened for output.
Ran 10000 cycles, finishing.
#TESTASSERTOUTPUT|---------------------------------------|
#TESTASSERTOUTPUT| Register File State :) |
#TESTASSERTOUTPUT|---------------------------------------|
#TESTASSERTOUTPUT| x00, zero = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x01, ra = 0xffffffff ( -1)|
#TESTASSERTOUTPUT| x02, sp = 0x00000023 ( 35)|
#TESTASSERTOUTPUT| x03, gp = 0x00000067 ( 103)|
#TESTASSERTOUTPUT| x04, tp = 0x00000033 ( 51)|
#TESTASSERTOUTPUT| x05, t0 = 0x00000001 ( 1)|
#TESTASSERTOUTPUT| x06, t1 = 0xffffff00 ( -256)|
#TESTASSERTOUTPUT| x07, t2 = 0x00000019 ( 25)|
#TESTASSERTOUTPUT| x08, s0 = 0x00000093 ( 147)|
#TESTASSERTOUTPUT| x09, s1 = 0x93130104 (-1827471100)|
#TESTASSERTOUTPUT| x10, a0 = 0x00009313 ( 37651)|
#TESTASSERTOUTPUT| x11, a1 = 0x93130104 (-1827471100)|
#TESTASSERTOUTPUT| x12, a2 = 0x00000010 ( 16)|
#TESTASSERTOUTPUT| x13, a3 = 0xffffffff ( -1)|
#TESTASSERTOUTPUT| x14, a4 = 0x00000067 ( 103)|
#TESTASSERTOUTPUT| x15, a5 = 0x00000023 ( 35)|
#TESTASSERTOUTPUT| x16, a6 = 0x00000004 ( 4)|
#TESTASSERTOUTPUT| x17, a7 = 0x00000230 ( 560)|
#TESTASSERTOUTPUT| x18, s2 = 0x00000006 ( 6)|
#TESTASSERTOUTPUT| x19, s3 = 0xfffffff0 ( -16)|
#TESTASSERTOUTPUT| x20, s4 = 0x00000001 ( 1)|
#TESTASSERTOUTPUT| x21, s5 = 0x00000000 ( 0)|
#TESTASSERTOUTPUT| x22, s6 = 0x00000023 ( 35)|
#TESTASSERTOUTPUT| x23, s7 = 0xfffffffc ( -4)|
#TESTASSERTOUTPUT| x24, s8 = 0x93130104 (-1827471100)|
#TESTASSERTOUTPUT| x25, s9 = 0x00000104 ( 260)|
#TESTASSERTOUTPUT| x26, s10 = 0x00000045 ( 69)|
#TESTASSERTOUTPUT| x27, s11 = 0x0000000c ( 12)|
#TESTASSERTOUTPUT| x28, t3 = 0x00000064 ( 100)|
#TESTASSERTOUTPUT| x29, t4 = 0x000001a4 ( 420)|
#TESTASSERTOUTPUT| x30, t5 = 0x00000045 ( 69)|
#TESTASSERTOUTPUT| x31, t6 = 0x00809313 ( 8426259)|
#TESTASSERTOUTPUT|---------------------------------------|
3 changes: 2 additions & 1 deletion src/components/Makefile
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Original file line number Diff line number Diff line change
Expand Up @@ -109,8 +109,9 @@ test_rv32_ir_types: addi.validate itypes.validate irtypes.validate
test_rv32_utypes: utypes.validate
test_rv32_branch: beq.validate bne.validate blt.validate bge.validate bgeu.validate bltu.validate
test_rv32_jal: jal_jalr.validate
test_rv32_integrated: ari_1.validate ari_2.validate

test_rv32_all: test_rv32_ir_types storeload.validate test_rv32_branch test_rv32_jal test_rv32_utypes
test_rv32_all: test_rv32_ir_types storeload.validate test_rv32_branch test_rv32_jal test_rv32_utypes test_rv32_integrated

# # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # #
# Instruction Type Tests
Expand Down

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