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  1. riscv riscv Public

    Forked from openhwgroup/cv32e40p

    RISCY is an in-order 4-stage RISC-V RV32IMFCXpulp CPU

    SystemVerilog 1

  2. rvv-llvm rvv-llvm Public

    Forked from plctlab/llvm-project

    程序语言与编译技术实验室的RISC-V相关仓库，基于 rkruppe/rvv-llvm 和 llvm/llvm-project

    C++ 1