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simple-RISC-simulator

A simple RISC cycle-accurate simulator.

Features

  • Cycle-accurate simulator.
  • 8 pipeline stages: IF1, IF2, ID, EXE, MEM1, MEM2, MEM3, WB. In fact this 8-stage is nothing different with classic 5-stage one. Extra stages do nothing but delay cycles.
  • 5 instructions: DADD, SUB, LD, SD, BNEZ.
  • Addressing methods: immediate, register, and indirect.
  • Support forwarding.

Compile

g++ -o simulator main.cpp

Usage

./simulator

It looks stupid to ask user to give asm files in an interactive way. Feel shamed about that.:)

Happy hacking.

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A simple RISC cycle-accurate simulator

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