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  1. AHB2APB-bridge-IP-core-verification AHB2APB-bridge-IP-core-verification Public

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    Complete verification environment. APB UVC. SPI UVC. RTL design not included

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  5. AMBA_APB_SRAM AMBA_APB_SRAM Public

    Forked from courageheart/AMBA_APB_SRAM

    AMBA v.3 APB v.1 Specification Complaint Slave SRAM Core design and testbench. The testbench is developed using System Verilog and UVM and can be used as standalone Verification IP (VIP).

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  6. uart2bustestbench uart2bustestbench Public

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    UVM Verification IP to uart2bus IP.

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