Pinned Loading

1. LuViRA_Dataset LuViRA_Dataset Public

   Lund University Vision, Radio, and Audio (LuViRA) Dataset

   12 2

2. CNN_for_SLR CNN_for_SLR Public

   A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.

   Verilog 89 30

3. Pipelined-FFT-with-SDF-and-CORDIC Pipelined-FFT-with-SDF-and-CORDIC Public

   A Pipelined Radix-2 FFT with SDF Architecture for 2048 Points with the CORDIC Algorithm in the first stage and dedicated multipliers in the 9th and 10th stages

   VHDL 8 2

4. PicoTETRIS PicoTETRIS Public

   Forked from gonultasbu/PicoTETRIS

   Tetris game written for PicoBlaze softprocessor that runs on a Spartan 3E FPGA, VGA interface written with Verilog.

   Verilog 2