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[SYCL] Add test cases for muptiplies,bit_or,bit_xor,bit_and subgroup … #158
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v-klochkov
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This enables SPIR-V operations defined in version 1.3. For example, it becomes possible to use sub-group algorithms reduce(), exclusive_scan(), inclusive_scan() with multiply, bitwise OR/XOR/AND operations. The corresponding LIT test update is here: intel/llvm-test-suite#158 Signed-off-by: Vyacheslav N Klochkov <vyacheslav.n.klochkov@intel.com>
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This patch enables SPIR-V operations defined in versions 1.2 and 1.3. The major change in SPIR-V 1.3 is adding more sub-group operations and this patch is motivated by the need to enable more sub-group algorithms such as reduce(), exclusive_scan(), inclusive_scan() with multiply,bitwise OR/XOR/AND operations. Lifting the max version to 1.3 should not cause backward compatibility issues as up to SPIR-V 1.3 there are no deleted SPIR-V operations. This though lifts the requirements to OpenCL and Level0 RT. The corresponding LIT test update is here: intel/llvm-test-suite#158 Signed-off-by: Vyacheslav N Klochkov <vyacheslav.n.klochkov@intel.com>
…algorithms These new test cases verify intel/llvm#3267 Signed-off-by: Vyacheslav N Klochkov <vyacheslav.n.klochkov@intel.com>
Signed-off-by: Vyacheslav N Klochkov <vyacheslav.n.klochkov@intel.com>
…n device had support for sub-groups Signed-off-by: Vyacheslav N Klochkov <vyacheslav.n.klochkov@intel.com>
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The buildbot on Linux reports an issue (SYCL::Plugin/interop-level-zero-keep-ownership.cpp) unrelated to this patch. |
vladimirlaz
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Signed-off-by: Vyacheslav N Klochkov <vyacheslav.n.klochkov@intel.com>
vladimirlaz
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@vladimirlaz - thank you for the approval. The only failed test is on linux buildbot: it is for unrelated test: SYCL::Plugin/interop-level-zero-keep-ownership.cpp |
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Mar 27, 2023
intel/llvm-test-suite#158) * Move spir-v 1.3 test cases to separate files to avoid failure on CUDA * Fix the check for sub-groups availability. It returned false even when device had support for sub-groups * Add checks for cl_khr_fp16/fp64
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…algorithms
Signed-off-by: Vyacheslav N Klochkov vyacheslav.n.klochkov@intel.com