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[SYCL] [L0] [PI] Corrections to interop tests to ensure batching behavior #948
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…vior independent of defaults. Signed-off-by: Rajiv Deodhar <rajiv.deodhar@intel.com>
Author
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/verify with #948 |
Author
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/verify with intel/llvm#5833 |
| // REQUIRES: level_zero, level_zero_dev_kit | ||
| // RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %level_zero_options %s -o %t.out | ||
| // RUN: env SYCL_BE=PI_LEVEL_ZERO %GPU_RUN_PLACEHOLDER %t.out | ||
| // RUN: env SYCL_BE=PI_LEVEL_ZERO SYCL_PI_LEVEL_ZERO_DEVICE_SCOPE_EVENTS=2 SYCL_PI_LEVEL_ZERO_USE_IMMEDIATE_COMMANDLISTS=0 %GPU_RUN_PLACEHOLDER %t.out |
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I don't see any check of traces in this test, so it should run with any env settings
| // REQUIRES: level_zero, level_zero_dev_kit | ||
| // RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out %level_zero_options | ||
| // RUN: env SYCL_BE=PI_LEVEL_ZERO %GPU_RUN_PLACEHOLDER %t.out | ||
| // RUN: env SYCL_BE=PI_LEVEL_ZERO SYCL_PI_LEVEL_ZERO_DEVICE_SCOPE_EVENTS=2 SYCL_PI_LEVEL_ZERO_USE_IMMEDIATE_COMMANDLISTS=0 %GPU_RUN_PLACEHOLDER %t.out |
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I don't see any check of traces in this test, so it should run with any env settings
smaslov-intel
suggested changes
Mar 25, 2022
| // REQUIRES: level_zero, level_zero_dev_kit | ||
| // RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out %level_zero_options %threads_lib | ||
| // RUN: %BE_RUN_PLACEHOLDER %t.out | ||
| // RUN: env SYCL_PI_LEVEL_ZERO_DEVICE_SCOPE_EVENTS=2 SYCL_PI_LEVEL_ZERO_USE_IMMEDIATE_COMMANDLISTS=0 %BE_RUN_PLACEHOLDER %t.out |
Author
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These tests fail if immediate commandlists are used in the L0 plugin. |
myler
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to myler/llvm-test-suite
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Mar 22, 2023
CMPLRTST-15892: support translate gpu-intel-* to alloy gpu feature.
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Some interop tests depend on assumptions about the plugin behavior with regard to commandlist and event usage. The expectations can be met by setting env vars that control batching and device-only events usage.