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SYCL Pre Commit on Linux

[SYCL] Refactor FPGA Memory Attributes Validation for Clarity and and Efficiency #6712

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[SYCL] Refactor FPGA Memory Attributes Validation for Clarity and and Efficiency

[SYCL] Refactor FPGA Memory Attributes Validation for Clarity and and Efficiency #6712

Triggered via pull request July 13, 2024 22:32
@smanna12smanna12
opened #14566
smanna12:RefactorFPGAMemAttr
Status Cancelled
Total duration 9m 56s
Artifacts –

sycl-linux-precommit.yml

on: pull_request
detect_changes  /  Decide which tests could be affected by the changes
6s
detect_changes / Decide which tests could be affected by the changes
build  /  Build + LIT
9m 38s
build / Build + LIT
Decide which Arc tests to run
0s
Decide which Arc tests to run
Matrix: test-perf
Waiting for pending jobs
Matrix: test
Waiting for pending jobs
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2 errors
build / Build + LIT
Canceling since a higher priority waiting request for 'SYCL Pre Commit on Linux-14566' exists
build / Build + LIT
The operation was canceled.