Skip to content

[SYCL][FPGA] Minor fix to the fpga_lsu header #2233

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 1 commit into from
Aug 20, 2020

Conversation

mohammadfawaz
Copy link
Contributor

@mohammadfawaz mohammadfawaz commented Jul 31, 2020

The load function should not return a ref. The translator expects the pointer
annotation result to be loaded directly.
Also, small minor fixes to the spec

@mohammadfawaz mohammadfawaz requested a review from a team as a code owner July 31, 2020 15:50
@mohammadfawaz
Copy link
Contributor Author

mohammadfawaz commented Jul 31, 2020

Actually, closing for now. This may not be an actual problem.
Edit: reopening. The translator expects a load right after the ptr.annotation (see KhronosGroup/SPIRV-LLVM-Translator#678)

@keryell
Copy link
Contributor

keryell commented Aug 3, 2020

These look like actual problems...

@mohammadfawaz
Copy link
Contributor Author

mohammadfawaz commented Aug 3, 2020

These look like actual problems...

The changes in the doc need to be fixed for sure.
Why is the change in the header required? At first, I thought it would be, but it doesn't seem to be an issue. Is returning a copy the preferred practice?

@mohammadfawaz mohammadfawaz reopened this Aug 16, 2020
@mohammadfawaz mohammadfawaz requested a review from a team as a code owner August 16, 2020 15:37
@romanovvlad romanovvlad requested a review from mlychkov August 18, 2020 09:28
@mohammadfawaz mohammadfawaz requested a review from bader August 18, 2020 18:43
@bader
Copy link
Contributor

bader commented Aug 18, 2020

@mohammadfawaz, could you resolve merge conflict, please?

The load function should not return a ref. The translator expects the pointer
annotation result to be loaded directly.
Also, small minor fixes to the spec
@bader
Copy link
Contributor

bader commented Aug 19, 2020

@intel/dpcpp-specification-reviewers, @intel/llvm-reviewers-runtime, ping.

@romanovvlad
Copy link
Contributor

@mlychkov Could you please, review?

@mohammadfawaz
Copy link
Contributor Author

Mike Kinsner is on vacation. @jbrodman will you please take a look before @bader can merge? The changes to the doc are all trivial: typos and capitalization of the intel namespace). Thanks!

@bader bader merged commit 82e5323 into intel:sycl Aug 20, 2020
jsji pushed a commit that referenced this pull request Dec 21, 2023
)

Pointer named Expected was taken by reference to closure to be executed
later by Mutator. Mutator executes the closure in his destructor
which happens after the destruction of Expected pointer stack frame.
This fix clears some ASan errors from #2233.

Original commit:
KhronosGroup/SPIRV-LLVM-Translator@c7cd904
jsji pushed a commit that referenced this pull request Dec 21, 2023
Allocated SPIRVExecutionMode class wasn't added as dependant resource in
SPIRVModule. Fix some ASan errors in issue #2233.

Original commit:
KhronosGroup/SPIRV-LLVM-Translator@1a19f6f
jsji pushed a commit that referenced this pull request Jan 4, 2024
…2265)

ImageOpMask pointer was passed to closure as reference.
Closure is executed outside of original stack frame which renders
reference invalid. Fixes some ASan errors from issue #2233.

Original commit:
KhronosGroup/SPIRV-LLVM-Translator@29d4cd3
Chenyang-L pushed a commit that referenced this pull request Feb 18, 2025
Improvements to align CTS and Spec for Memory
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

7 participants