Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

[SPIR-V] Add CapabilityFPGABufferLocationINTEL only when the decorati… #2240

Merged
merged 1 commit into from
Aug 5, 2020

Conversation

MrSidims
Copy link
Contributor

@MrSidims MrSidims commented Aug 2, 2020

…on is added

Signed-off-by: Dmitry Sidorov dmitry.sidorov@intel.com

…on is added

Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
@MrSidims
Copy link
Contributor Author

MrSidims commented Aug 5, 2020

@AlexeySachkov @AlexeySotkin ping

Copy link
Contributor

@AlexeySachkov AlexeySachkov left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

This is a cherry-pick of KhronosGroup/SPIRV-LLVM-Translator#660, which I already approved, but not yet merged due to some troubles with CI.

I'm okay to merge this PR right now if it blocks someone - the same change will be merged into the translator as soon as I fix all CI issues (happened because llvm switch from 11 to 12)

@bader bader merged commit 88cbe10 into intel:sycl Aug 5, 2020
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

4 participants