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[SYCL] Expanded Ahead Of Time Compilation support #262

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merged 1 commit into from
Jul 11, 2019

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mdtoguchi
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Adds support for AOT compilation in a single pass. Support is triggered by
using a sub architecture value in the triple. The following 3 are supported:

spir64_fpga, spir64_x86_64, spir64_gen

When one of these are used, the respective backend compiler (aoc, ioc or cloc)
is invoked to perform the AOT compilation. That device binary is then wrapped
and included in the final binary.

Additional options can also be added to the SYCL device compilation, the
Backend compile or the device link. These are handled by -Xsycl-compiler,
-Xsycl-target or -Xsycl-linker respectively

Signed-off-by: Michael D Toguchi michael.d.toguchi@intel.com

@mdtoguchi mdtoguchi requested review from kbobrovs and vzakhari June 27, 2019 15:55
CmdArgs.push_back("-cmd=link");
CmdArgs.push_back("-device=cpu");
for (const auto &II : Inputs) {
CmdArgs.push_back(Args.MakeArgString(Twine("-binary=") + II.getFilename()));
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What are the Inputs here? LLVM IR Bitcode with spir64 triple?

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What are the Inputs here? LLVM IR Bitcode with spir64 triple?

Yes, that is the expected input for ioc. Depending on expectations of the tool, this can either be LLVM-IR or SPIR-V.

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This may work for now, but LLVM IR is not a stable interface and older/newer CPU runtime may not consume LLVM IR generated by SYCL clang.

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Be optimistic... :-)

@mdtoguchi mdtoguchi force-pushed the private/mdtoguchi/aot-enhancements branch from 96d3590 to 2f8c780 Compare June 29, 2019 01:03
@mdtoguchi mdtoguchi force-pushed the private/mdtoguchi/aot-enhancements branch from 2f8c780 to 552d378 Compare July 2, 2019 18:48
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Changes refactored to remove CPU support for now. CPU support will be added later.

@bader bader requested a review from asavonic July 9, 2019 13:44
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asavonic commented Jul 9, 2019

Can you include an example of compilation commands for 1-step offline compilation for FPGA and GPU?

@mdtoguchi mdtoguchi force-pushed the private/mdtoguchi/aot-enhancements branch from 552d378 to deeec85 Compare July 9, 2019 15:29
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Can you include an example of compilation commands for 1-step offline compilation for FPGA and GPU?

FPGA: clang++ -fsycl -fsycl-targets=spir64_fpga-unknown-linux-sycldevice
testfile.cpp -Xsycl-target "-DFOO"
GEN: clang++ -fsycl -fsycl-targets=spir64_gen-unknown-linux-sycldevice
testfile.cpp -Xsycl-target "-device skl"

I also added these command lines to the commit message.

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In general I would be quite interested at some point in the future in seeing some shiny new documentation on the commands added to the driver and how to use all these new commands, maybe that's a silly request though which I can understand.

But I think it does help to elaborate a little on it outside of the table gen files/commit logs. I know there is some coverage of this inside of: https://github.com/intel/llvm/blob/sycl/sycl/doc/SYCL_compiler_and_runtime_design.md but I'm not too sure how up-to-date it is (and perhaps there is some documentation elsewhere I'm unaware of).

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mdtoguchi commented Jul 9, 2019 via email

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Any other comments? Would be great to get this in so I can (more easily) work on the AOT CPU enabling work. :)

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@mdtoguchi, looks good.
I have a couple of suggestions.
Let me know how do you feel about applying them.

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@mdtoguchi, looks good.
I have a couple of suggestions.
Let me know how do you feel about applying them.

I can work on your suggestions and also modify the option names added to match what was decided for the -Xsycl*.

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bader commented Jul 10, 2019

@mdtoguchi, looks good.
I have a couple of suggestions.
Let me know how do you feel about applying them.

I can work on your suggestions and also modify the option names added to match what was decided for the -Xsycl*.

Great. I'll wait for updated version then.
Thanks for working on this and sorry for the late review.

Adds support for AOT compilation in a single pass.  Support is triggered by
using a sub architecture value in the triple.  The following 2 are supported:

spir64_fpga, spir64_gen

When one of these are used, the respective backend compiler (aoc, ocloc)
is invoked to perform the AOT compilation.  That device binary is then wrapped
and included in the final binary.

Additional options can also be added to the SYCL device compilation, the
Backend compile or the device link.  These are handled by
-Xsycl-target-frontend, -Xsycl-target-backend or -Xsycl-target-linker
respectively

Example command lines:
FPGA:  clang++ -fsycl -fsycl-targets=spir64_fpga-unknown-linux-sycldevice
       testfile.cpp -Xsycl-target-backend "-DFOO"
GEN:   clang++ -fsycl -fsycl-targets=spir64_gen-unknown-linux-sycldevice
       testfile.cpp -Xsycl-target-backend "-device skl"

Signed-off-by: Michael D Toguchi <michael.d.toguchi@intel.com>
@mdtoguchi mdtoguchi force-pushed the private/mdtoguchi/aot-enhancements branch from deeec85 to 788e384 Compare July 11, 2019 01:11
@bader bader merged commit c451ac3 into intel:sycl Jul 11, 2019
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mdtoguchi commented Jul 11, 2019 via email

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6 participants