[SYCL][ESIMD] Enable type rewriting in spirv writer adaptor #2718
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asi-sc
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Fznamznon,
elizabethandrews and
premanandrao
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| if (LangOpts.SYCLIsDevice && LangOpts.SYCLExplicitSIMD) | ||
| PerModulePasses.add(createGenXSPIRVWriterAdaptorPass()); | ||
| PerModulePasses.add( | ||
| createGenXSPIRVWriterAdaptorPass(/*RewriteTypes=*/true)); |
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I am not entirely sure what this change does. Can you provide some details in the commit description?
Please add an appropriate test as well.
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Yes, it would be great to have some context here. Although I'm not sure if front-end test is required. I think this thing enables some functionality of the GenXSPIRVWriterAdaptorPass which is likely already tested by LIT suite for this particular pass.
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Sure, I'll add some details in the next iteration of this change. We've realized that an additional change in vc-intrinsics (library where GenXSPIRVAdaptorPass comes from) is required. So, I mark the pull request as a draft for now.
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The approach has been changed slightly in libigc vector compute backend. This change is no longer necessary. |
Per cl_intel_subgroups_short V 1.1.0 short16 is allowed for these builtins. Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com> Original commit: KhronosGroup/SPIRV-LLVM-Translator@6895a2eb5d053d8
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