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7 changes: 6 additions & 1 deletion llvm/lib/SYCLLowerIR/LowerESIMD.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -28,6 +28,7 @@
#include "llvm/IR/Instructions.h"
#include "llvm/IR/IntrinsicInst.h"
#include "llvm/IR/Module.h"
#include "llvm/IR/PatternMatch.h"
#include "llvm/Pass.h"
#include "llvm/Support/raw_ostream.h"

Expand Down Expand Up @@ -1296,7 +1297,11 @@ size_t SYCLLowerESIMDPass::runOnFunction(Function &F,
auto *CI = dyn_cast<CallInst>(&I);
Function *Callee = nullptr;
if (CI && (Callee = CI->getCalledFunction())) {

// TODO workaround for ESIMD BE until it starts supporting @llvm.assume
if (match(&I, PatternMatch::m_Intrinsic<Intrinsic::assume>())) {
ESIMDToErases.push_back(CI);
continue;
}
StringRef Name = Callee->getName();

// See if the Name represents an ESIMD intrinsic and demangle only if it
Expand Down
12 changes: 12 additions & 0 deletions llvm/test/SYCLLowerIR/esimd_lower_intrins.ll
Original file line number Diff line number Diff line change
Expand Up @@ -308,6 +308,18 @@ define dso_local spir_func <16 x i32> @FUNC_44() {
ret <16 x i32> %ret_val
}

; TODO LowerESIMD.cpp temporarily removes @llvm.assume, this test checks this.
; Remove once @llvm.assume is allowed in the ESIMD BE.
define dso_local spir_func void @FUNC_45() {
; CHECK-LABEL: FUNC_45
call void @llvm.assume(i1 1)
; CHECK-NOT: @llvm.assume
ret void
}
; CHECK-LABEL: }

declare void @llvm.assume(i1 noundef)

declare dso_local spir_func <32 x i32> @_Z20__esimd_flat_atomic0ILN2cm3gen14CmAtomicOpTypeE2EjLi32ELNS1_9CacheHintE0ELS3_0EENS1_13__vector_typeIT0_XT1_EE4typeENS4_IyXT1_EE4typeENS4_ItXT1_EE4typeE(<32 x i64> %0, <32 x i16> %1)
declare dso_local spir_func <32 x i32> @_Z20__esimd_flat_atomic1ILN2cm3gen14CmAtomicOpTypeE0EjLi32ELNS1_9CacheHintE0ELS3_0EENS1_13__vector_typeIT0_XT1_EE4typeENS4_IyXT1_EE4typeES7_NS4_ItXT1_EE4typeE(<32 x i64> %0, <32 x i32> %1, <32 x i16> %2)
declare dso_local spir_func <32 x i32> @_Z20__esimd_flat_atomic2ILN2cm3gen14CmAtomicOpTypeE7EjLi32ELNS1_9CacheHintE0ELS3_0EENS1_13__vector_typeIT0_XT1_EE4typeENS4_IyXT1_EE4typeES7_S7_NS4_ItXT1_EE4typeE(<32 x i64> %0, <32 x i32> %1, <32 x i32> %2, <32 x i16> %3)
Expand Down