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[NFC] Remove LLVM type name altering #3915

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Merged
merged 10 commits into from
Oct 9, 2021
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@bader bader commented Jun 10, 2021

This is a leftover from early DPC++ prototype

bader added 2 commits June 10, 2021 17:12
This is a leftover from early DPC++ prototype
@bader bader requested a review from rbegam June 10, 2021 17:18
@bader bader linked an issue Jun 10, 2021 that may be closed by this pull request
@bader bader requested a review from Fznamznon June 10, 2021 17:19
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bader commented Jun 10, 2021

/summary:run

Fznamznon
Fznamznon previously approved these changes Jun 10, 2021
@@ -45,14 +45,14 @@ SYCL_ESIMD_FUNCTION SYCL_EXTERNAL simd<float, 16> foo() {
simd<ushort, VL> pred;
v_addr += offsets;

__esimd_flat_atomic0<EsimdAtomicOpType::ATOMIC_INC, uint32_t, VL>(
__esimd_flat_atomic0<EsimdAtomicOpType::inc, uint32_t, VL>(
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Since you are editing this anyway, this needs 1 more step (EsimdAtomicOpType itself is deprecated)

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__esimd_flat_atomic0<EsimdAtomicOpType::inc, uint32_t, VL>(
__esimd_flat_atomic0<atomic_op::inc, uint32_t, VL>(

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EsimdAtomicOpType itself is deprecated

The compiler gives a message only about using ATOMIC_*.
I suggest we update the tests together with adding corresponding diagnostics.

v_addr.data(), pred.data());
// CHECK: %{{[0-9a-zA-Z_.]+}} = call <32 x i32> @llvm.genx.svm.atomic.inc.v32i32.v32i1.v32i64(<32 x i1> %{{[0-9a-zA-Z_.]+}}, <32 x i64> %{{[0-9a-zA-Z_.]+}}, <32 x i32> undef)

__esimd_flat_atomic1<EsimdAtomicOpType::ATOMIC_ADD, uint32_t, VL>(
__esimd_flat_atomic1<EsimdAtomicOpType::add, uint32_t, VL>(
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Suggested change
__esimd_flat_atomic1<EsimdAtomicOpType::add, uint32_t, VL>(
__esimd_flat_atomic1<atomic_op::add, uint32_t, VL>(

v_addr.data(), v1, pred.data());
// CHECK: %{{[0-9a-zA-Z_.]+}} = call <32 x i32> @llvm.genx.svm.atomic.add.v32i32.v32i1.v32i64(<32 x i1> %{{[0-9a-zA-Z_.]+}}, <32 x i64> %{{[0-9a-zA-Z_.]+}}, <32 x i32> %{{[0-9a-zA-Z_.]+}}, <32 x i32> undef)
__esimd_flat_atomic2<EsimdAtomicOpType::ATOMIC_CMPXCHG, uint32_t, VL>(
__esimd_flat_atomic2<EsimdAtomicOpType::cmpxchg, uint32_t, VL>(
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Suggested change
__esimd_flat_atomic2<EsimdAtomicOpType::cmpxchg, uint32_t, VL>(
__esimd_flat_atomic2<atomic_op::cmpxchg, uint32_t, VL>(

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bader commented Jun 22, 2021

@keryell, FYI. According to #304 there is a work-around in triSYCL to align mangling with llorg compiler. I expect that we can remove this workaround with this patch.

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keryell commented Jun 22, 2021

@keryell, FYI. According to #304 there is a work-around in triSYCL to align mangling with llorg compiler. I expect that we can remove this workaround with this patch.

Probably.
I cannot remember the details...
We will see next time we merge from you... :-)

@bader bader requested review from kbobrovs and Fznamznon June 22, 2021 20:30
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bader commented Jun 22, 2021

I looked at the failures in pre-commit and it seems to be a bug in low-level runtime. I filed a bug report and we probably have to wait for a fix. Meanwhile, we can review the DPC++ changes.

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Fznamznon previously approved these changes Jun 23, 2021
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keryell commented Jun 24, 2021

@Ralender & @lforg37 ?

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bader commented Jun 28, 2021

This change unveils a bug in SYCL pipes implementation for Intel FPGA emulator.
To avoid regressions, we should fix Intel FPGA emulator first, but unfortunately next Intel FPGA emulator update is expected in ~4 months.
Moving this PR to draft.

@bader bader marked this pull request as draft June 28, 2021 13:14
@bader bader dismissed stale reviews from Fznamznon and elizabethandrews via 29a97c9 October 8, 2021 15:35
@bader bader marked this pull request as ready for review October 8, 2021 17:20
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bader commented Oct 8, 2021

/summary:run

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LGTM

@bader bader merged commit 97aec64 into intel:sycl Oct 9, 2021
@bader bader deleted the llvm-type-altering branch October 9, 2021 08:14
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[SYCL][Compilation] Question on Mangling of Record Types
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