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11 changes: 9 additions & 2 deletions llvm/lib/SYCLLowerIR/LowerESIMD.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1350,11 +1350,18 @@ SmallPtrSet<Type *, 4> collectGenXVolatileTypes(Module &M) {
continue;
auto GTy = dyn_cast<StructType>(PTy->getPointerElementType());
// TODO FIXME relying on type name in LLVM IR is fragile, needs rework
if (!GTy || !GTy->getName().endswith(
"cl::sycl::ext::intel::experimental::esimd::simd"))
if (!GTy ||
!GTy->getName().endswith("sycl::ext::intel::experimental::esimd::simd"))
continue;
assert(GTy->getNumContainedTypes() == 1);
auto VTy = GTy->getContainedType(0);
if (GTy = dyn_cast<StructType>(VTy)) {
assert(
GTy &&
GTy->getName().endswith(
"sycl::ext::intel::experimental::esimd::detail::simd_obj_impl"));
VTy = GTy->getContainedType(0);
}
assert(VTy->isVectorTy());
GenXVolatileTypeSet.insert(VTy);
}
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16 changes: 10 additions & 6 deletions llvm/lib/SYCLLowerIR/LowerESIMDVecArg.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -110,14 +110,18 @@ ModulePass *llvm::createESIMDLowerVecArgPass() {
// nullptr.
Type *ESIMDLowerVecArgPass::getSimdArgPtrTyOrNull(Value *arg) {
auto ArgType = dyn_cast<PointerType>(arg->getType());
if (!ArgType || !ArgType->getElementType()->isStructTy())
if (!ArgType)
return nullptr;
auto ContainedType = ArgType->getElementType();
if ((ContainedType->getStructNumElements() != 1) ||
!ContainedType->getStructElementType(0)->isVectorTy())
Type *Res = nullptr;
StructType *ST = dyn_cast_or_null<StructType>(ArgType->getElementType());

while (ST && (ST->getStructNumElements() == 1)) {
Res = ST->getStructElementType(0);
ST = dyn_cast<StructType>(Res);
}
if (!Res || !Res->isVectorTy())
return nullptr;
return PointerType::get(ContainedType->getStructElementType(0),
ArgType->getPointerAddressSpace());
return PointerType::get(Res, ArgType->getPointerAddressSpace());
}

// F may have multiple arguments of type simd*. This
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Original file line number Diff line number Diff line change
Expand Up @@ -18,9 +18,6 @@
#include <assert.h>
#include <cstdint>

#define __SEIEED sycl::ext::intel::experimental::esimd::detail
#define __SEIEE sycl::ext::intel::experimental::esimd

// \brief __esimd_rdregion: region access intrinsic.
//
// @param T the element data type, one of i8, i16, i32, i64, half, float,
Expand Down Expand Up @@ -125,14 +122,14 @@ template <typename T, int N, int M, int VStride, int Width, int Stride,
SYCL_EXTERNAL SYCL_ESIMD_FUNCTION __SEIEED::vector_type_t<T, N>
__esimd_wrregion(__SEIEED::vector_type_t<T, N> OldVal,
__SEIEED::vector_type_t<T, M> NewVal, uint16_t Offset,
__SEIEE::mask_type_t<M> Mask = 1);
__SEIEED::simd_mask_storage_t<M> Mask = 1);

template <typename T, int N, int M, int ParentWidth = 0>
SYCL_EXTERNAL SYCL_ESIMD_FUNCTION __SEIEED::vector_type_t<T, N>
__esimd_wrindirect(__SEIEED::vector_type_t<T, N> OldVal,
__SEIEED::vector_type_t<T, M> NewVal,
__SEIEED::vector_type_t<uint16_t, M> Offset,
__SEIEE::mask_type_t<M> Mask = 1);
__SEIEED::simd_mask_storage_t<M> Mask = 1);

__SYCL_INLINE_NAMESPACE(cl) {
namespace sycl {
Expand Down Expand Up @@ -286,7 +283,7 @@ template <typename T, int N, int M, int VStride, int Width, int Stride,
SYCL_EXTERNAL SYCL_ESIMD_FUNCTION __SEIEED::vector_type_t<T, N>
__esimd_wrregion(__SEIEED::vector_type_t<T, N> OldVal,
__SEIEED::vector_type_t<T, M> NewVal, uint16_t Offset,
__SEIEE::mask_type_t<M> Mask) {
__SEIEED::simd_mask_storage_t<M> Mask) {
uint16_t EltOffset = Offset / sizeof(T);
assert(Offset % sizeof(T) == 0);

Expand All @@ -310,7 +307,7 @@ SYCL_EXTERNAL SYCL_ESIMD_FUNCTION __SEIEED::vector_type_t<T, N>
__esimd_wrindirect(__SEIEED::vector_type_t<T, N> OldVal,
__SEIEED::vector_type_t<T, M> NewVal,
__SEIEED::vector_type_t<uint16_t, M> Offset,
__SEIEE::mask_type_t<M> Mask) {
__SEIEED::simd_mask_storage_t<M> Mask) {
__SEIEED::vector_type_t<T, N> Result = OldVal;
for (int i = 0; i < M; ++i) {
if (Mask[i]) {
Expand All @@ -324,6 +321,3 @@ __esimd_wrindirect(__SEIEED::vector_type_t<T, N> OldVal,
}

#endif // __SYCL_DEVICE_ONLY__

#undef __SEIEE
#undef __SEIEED
Original file line number Diff line number Diff line change
Expand Up @@ -15,11 +15,10 @@
#include <sycl/ext/intel/experimental/esimd/common.hpp>
#include <sycl/ext/intel/experimental/esimd/detail/host_util.hpp>
#include <sycl/ext/intel/experimental/esimd/detail/types.hpp>
#include <sycl/ext/intel/experimental/esimd/detail/util.hpp>

#include <cstdint>

#define __SEIEED sycl::ext::intel::experimental::esimd::detail

// saturation intrinsics
template <typename T0, typename T1, int SZ>
SYCL_EXTERNAL SYCL_ESIMD_FUNCTION __SEIEED::vector_type_t<T0, SZ>
Expand Down Expand Up @@ -385,8 +384,6 @@ inline T extract(const uint32_t &width, const uint32_t &offset, uint32_t src,
return ret;
}

#define __SEIEEED sycl::ext::intel::experimental::esimd::emu::detail

template <typename T0, typename T1, int SZ>
inline __SEIEED::vector_type_t<T0, SZ>
__esimd_satf(__SEIEED::vector_type_t<T1, SZ> src) {
Expand Down Expand Up @@ -1327,8 +1324,4 @@ __esimd_reduced_smin(__SEIEED::vector_type_t<Ty, N> src1,
return __esimd_reduced_min<Ty, N>(src1, src2);
}

#undef __SEIEEED

#endif // #ifdef __SYCL_DEVICE_ONLY__

#undef __SEIEED
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