[SYCL][L0] Make all L0 events have device-visibility #4534
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…only create/signal/query their host-visible proxy event on demand. Signed-off-by: Sergey V Maslov <sergey.v.maslov@intel.com>
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Signed-off-by: Sergey V Maslov <sergey.v.maslov@intel.com>
Signed-off-by: Sergey V Maslov <sergey.v.maslov@intel.com>
Signed-off-by: Sergey V Maslov <sergey.v.maslov@intel.com>
Signed-off-by: Sergey V Maslov <sergey.v.maslov@intel.com>
Signed-off-by: Sergey V Maslov <sergey.v.maslov@intel.com>
againull
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asudarsa
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This is just a nitpick. Looks good to me..
alexbatashev
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* upstream/sycl: (36 commits) [SYCL] Add SYCL2020 target::device enumeration value (intel#4587) [SYCL][Doc] Update ITT instrumentation docs (intel#4503) [SYCL][L0] Make all L0 events have device-visibility (intel#4534) [SYCL] Updated Level-Zero backend spec according to SYCL 2020 standard (intel#4560) [SYCL] Add error_code support for SYCL 1.2.1 exception classes (intel#4574) [SYCL][CI] Provide --ci-defaults option for config script (intel#4583) [CI] Switch GitHub Actions to Ubuntu 20.04 (intel#4582) [SYCL][CUDA] Fix context clearing in PiCuda tests (intel#4483) [SYCL] Hide SYCL service kernels (intel#4519) [SYCL][L0] Fix mismatched ZE call count (intel#4559) [SYCL] Remove function pointers extension (intel#4459) [GitHub Actions] Uplift clang version in post-commit validation (intel#4581) [SYCL] Ignore usm prefetch dummy flag (intel#4568) [SYCL][Group algorithms] Add group sorting algorithms implementation (intel#4439) [SYCL] Resolve name clash with a user defined symbol (intel#4570) [clang-offload-wrapper] Do not create .tgtimg section with -emit-reg-funcs=0 (intel#4577) [SYCL][FPGA] Remove deprecated attribute functionality (intel#4532) [SYCL] Remove _class aliases (intel#4465) [SYCL][CUDA][HIP] Report every device in its own platform (intel#4571) [SYCL][L0] make_device shouldn't need platform as an input (intel#4561) ...
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Make all L0 events have device-visibility by default, and only create/signal/query their host-visible proxy event on demand.
Since this is not showing better performance yet and requires further tuning, I am going to disable it by default initially.
Test is coming in intel/llvm-test-suite#456
Signed-off-by: Sergey V Maslov sergey.v.maslov@intel.com