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@vmaksimo vmaksimo commented Mar 28, 2022

Siva Chandra Reddy and others added 30 commits March 24, 2022 07:02
Previously, we used empty, non-ELF crti.o, crtn.o, libm.a and libc++.a
files. Instead, we now still use dummies but they are real ELF object
files and archives.
Add cli options for new passmanager plugin support to lld.

Currently it is not possible to load dynamic NewPM plugins with lld. This is an
incremental update to D76866. While that patch only added cli options for
llvm-lto2, this adds them for lld as well. This is especially useful for running
dynamic plugins on the linux kernel with LTO.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D120490
Move the SourceRange from the old ParsedAttributesWithRange into
ParsedAttributesView, so we have source range information available
everywhere we use attributes.

This also removes ParsedAttributesWithRange (replaced by simply using
ParsedAttributes) and ParsedAttributesVieWithRange (replaced by using
ParsedAttributesView).

Differential Revision: https://reviews.llvm.org/D121201
Add patterns for vector widening integer multiply instructions

Differential Revision: https://reviews.llvm.org/D117385
This patch adds lowering support (from PFT to FIR) for sections construct

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D122302
Similarly to LBOUND in https://reviews.llvm.org/D121488, UBOUND must
return zero for an empty dimension, no matter the specification
expression.

Add a GetUBOUND method to be used in expression rewrite that prevents
folding UBOUND to a bound specification expression if the extent is
not a compile time constant.

Fold the case where the extents is known to be zero (and also deal with
this case in LBOUND since we can and should to comply with constant
expression requirements).

Differential Revision: https://reviews.llvm.org/D122242
MSVC supports passing /Wv and /Wv:17 to ignore warnings added
since that version. Clang doesn't have a option like this - but
we can ignore this flag instead of error.

MSVC documentation: https://docs.microsoft.com/en-us/cpp/build/reference/compiler-option-warning-level

Reviewed By: hans, mstorsjo

Differential Revision: https://reviews.llvm.org/D122298
There is no need to lower the implicit lower bounds for assumed-shape
array in lowerExplicitLowerBounds. Remove the unused code.

Reviewed By: Jean Perier

Differential Revision: https://reviews.llvm.org/D122280
Adding LLVM security group as another topic I can talk about.
This reverts commit 32012eb.

Broke CMake configuration.
In some cases, we need to set alternative toolchain path other than the
default with system (headers, libraries, dynamic linker prefix, ld path,
etc.), e.g., to pick up newer components, but keep sysroot at the same
time (to pick up extra packages).

This change introduces a new option --overlay-platform-toolchain to set
up such alternative toolchain path.

Reviewed By: hubert.reinterpretcast

Differential Revision: https://reviews.llvm.org/D121992
…er list."

This reverts commit 126b37a.

Regressed some ObjC patterns, see comments on https://reviews.llvm.org/D121584.
Since function parameters and return values are passed via param space, we
can force special alignment for values hold in it which will add vectorization
options. This change may be done if the function has private or internal
linkage. Special alignment is forced during 2 phases.

1) Instruction selection lowering. Here we use special alignment for function
   prototypes (changing both own return value and parameters alignment), call
   lowering (changing both callee's return value and parameters alignment).

2) IR pass nvptx-lower-args. Here we change alignment of byval parameters that
   belong to param space (or are casted to it). We only handle cases when all
   uses of such parameters are loads from it. For such loads, we can change the
   alignment according to special type alignment and the load offset. Then,
   load-store-vectorizer IR pass will perform vectorization where alignment
   allows it.

Special alignment calculated as maximum from default ABI type alignment and
alignment 16. Alignment 16 is chosen because it's the maximum size of
vectorized ld.param & st.param.

Before specifying such special alignment, we should check if it is a multiple
of the alignment that the type already has. For example, if a value has an
enforced alignment of 64, default ABI alignment of 4 and special alignment
of 16, we should preserve 64.

This patch will be followed by a refactoring patch that removes duplicating
code in handling byval and non-byval arguments.

Differential Revision: https://reviews.llvm.org/D121549
This reverts commit f854434.

Placed URL to wrong differential revision in commit message.
Since function parameters and return values are passed via param space, we
can force special alignment for values hold in it which will add vectorization
options. This change may be done if the function has private or internal
linkage. Special alignment is forced during 2 phases.

1) Instruction selection lowering. Here we use special alignment for function
   prototypes (changing both own return value and parameters alignment), call
   lowering (changing both callee's return value and parameters alignment).

2) IR pass nvptx-lower-args. Here we change alignment of byval parameters that
   belong to param space (or are casted to it). We only handle cases when all
   uses of such parameters are loads from it. For such loads, we can change the
   alignment according to special type alignment and the load offset. Then,
   load-store-vectorizer IR pass will perform vectorization where alignment
   allows it.

Special alignment calculated as maximum from default ABI type alignment and
alignment 16. Alignment 16 is chosen because it's the maximum size of
vectorized ld.param & st.param.

Before specifying such special alignment, we should check if it is a multiple
of the alignment that the type already has. For example, if a value has an
enforced alignment of 64, default ABI alignment of 4 and special alignment
of 16, we should preserve 64.

This patch will be followed by a refactoring patch that removes duplicating
code in handling byval and non-byval arguments.

Differential Revision: https://reviews.llvm.org/D120129
Non-static class members declared under #ifndef NDEBUG should be declared
under #if LLVM_ENABLE_ABI_BREAKING_CHECKS to make headers library-friendly and
allow cross-linking, as discussed in D120714.

Differential Revision: https://reviews.llvm.org/D121549
This matches the CMake default. LLVM_UNREACHABLE_OPTIMIZE=0 doesn't
build with gcc
jhuber6 and others added 12 commits March 25, 2022 22:44
This patch adds the necessary AMDGPU calling convention to the ctor /
dtor kernels. These are fundamentally device kenels called by the host
on image load. Without this calling convention information the AMDGPU
plugin is unable to identify them.

Depends on D122504

Fixes #54091

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D122515
…urces

As we mentioned in the code comments for function `ResourcePoolTy::release`,
at some point there could be two identical resources on the two sides of `Next`
mark. It is usually not an issue, unless the following case:
1. Some resources are not returned.
2. We need to iterate the pool and free the element.

That will cause double free, which is the case for event pool. Since we don't release
events hold by the data map, it can happen that the `Next` mark is not reset, and
we have two identical items in the pool. When the pool is destroyed, we will call
`cuEventDestroy` twice on the same event. In the best case, we can only observe
CUDA errors. In the worst case, it can cause internal failures in CUDART and further
crash.

This patch fixes the issue by tracking all resources that have been given using
an `unordered_set`. We don't remove it when a resource is returned. When the pool
is destroyed, we merge the pool (a `vector`) and the set. In this way, we can make
sure that the set contains all resources allocated from the device. We just need
to iterate the set and free the resource accordingly.

For now, only event pool is set to use it. Stream pool is not because we can make
sure all streams are returned when the plugin is destroyed.

Someone might be wondering, why don't we release all events hold in the data map.
That is because, plugins are determined to be destroyed *before* `libomptarget`.
If we can somehow make the plugin outlast `libomptarget`, life will be much
easier.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D122014
See `D119309` for the guideline (-target, -no-canonical-prefixes, unneeded -o
with -###).
… NFC

The default argument true is error-prone: I think many would think the
default is false.
  CONFLICT (content): Merge conflict in clang/lib/Driver/ToolChains/AMDGPU.cpp
@vmaksimo vmaksimo added the disable-lint Skip linter check step and proceed with build jobs label Mar 28, 2022
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Hi, @mdtoguchi! After afaefb6 change in LLORG we got the failing tests on Linux (74 tests on check-sycl target). The linker fails in finding -lsycl.
Some tests also have such a warning before the fail (for cuda target):
Linking two modules of different target triples: 'lib/clang/15.0.0/../../clc/remangled-l64-signed_char.libspirv-nvptx64--nvidiacl.bc' is 'nvptx64-unknown-nvidiacl' whereas 'sycl/test/basic_tests/accessor/accessor_property_list_ct.cpp' is 'nvptx64-nvidia-cuda'.
And for Windows runs only Driver/sycl-offload-static-lib-2.cpp clang test fails, but this one is most likely not related to the mentioned community change.
Could you please take a look at this issue?

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/summary:run

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/verify with intel/llvm-test-suite#957

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@vladimirlaz
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/verify with intel/llvm-test-suite#957

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/verify with intel/llvm-test-suite#957

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/summary:run

@vladimirlaz vladimirlaz marked this pull request as ready for review March 31, 2022 09:34
@vladimirlaz vladimirlaz requested review from a team and bader as code owners March 31, 2022 09:34
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/merge

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bb-sycl commented Mar 31, 2022

Thu 31 Mar 2022 09:36:07 AM UTC --- Start to merge the commit into sycl branch. It will take several minutes.

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bb-sycl commented Mar 31, 2022

Thu 31 Mar 2022 09:39:44 AM UTC --- Merge the branch in this PR to base automatically. Will close the PR later.

@bb-sycl bb-sycl merged commit dabdbd4 into intel:sycl Mar 31, 2022
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