[SPIR-V][DOC] Update SPV_INTEL_joint_matrix extension #8175
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Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
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FYI @dkhaldi @arnamoy10 . This should help with |
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The instruction returns (Row, Column) coordinate of dynamically selected element of a matrix Updated version of the spec is here intel/llvm#8175 Instruction correctness checks and get coord related capability will be added later among non-backward compatible changes. Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
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It specifies how to interpret 'Component Type' when components of a joint matrix are storages for values of different types, for example float for TF32, unsigned short for bfloat16. Spec update: intel/llvm#8175 Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
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The instruction returns (Row, Column) coordinate of dynamically selected element of a matrix Updated version of the spec is here intel/llvm#8175 Instruction correctness checks will be added later among non-backward compatible changes. Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
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It specifies how to interpret 'Component Type' when components of a joint matrix are storages for values of different types, for example float for TF32, unsigned short for bfloat16. Spec update: intel/llvm#8175 Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
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JointMatrixMadINTEL will stand for signed/signed Matrix type JointMatrixSUMadINTEL will stand for signed/signed Matrix type JointMatrixUSMadINTEL will stand for unsigned/signed Matrix type JointMatrixUUMadINTEL will stand for unsigned/unsigned Matrix type Spec update: intel/llvm#8175 Signed-off-by: Dmitry Sidorov dmitry.sidorov@intel.com
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JointMatrixMadINTEL will stand for signed/signed Matrix type JointMatrixSUMadINTEL will stand for signed/signed Matrix type JointMatrixUSMadINTEL will stand for unsigned/signed Matrix type JointMatrixUUMadINTEL will stand for unsigned/unsigned Matrix type Spec update: intel#8175 Signed-off-by: Dmitry Sidorov dmitry.sidorov@intel.com Original commit: KhronosGroup/SPIRV-LLVM-Translator@a7a1d2f
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The instruction returns (Row, Column) coordinate of dynamically selected element of a matrix Updated version of the spec is here intel/llvm#8175 Instruction correctness checks will be added later among non-backward compatible changes. Signed-off-by: Sidorov, Dmitry dmitry.sidorov@intel.com
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It specifies how to interpret 'Component Type' when components of a joint matrix are storages for values of different types, for example float for TF32, unsigned short for bfloat16. Spec update: intel/llvm#8175 Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
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It specifies how to interpret 'Component Type' when components of a joint matrix are storages for values of different types, for example float for TF32, unsigned short for bfloat16. Spec update: intel/llvm#8175 Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
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It specifies how to interpret 'Component Type' when components of a joint matrix are storages for values of different types, for example float for TF32, unsigned short for bfloat16. At this point only tf32 type interpretation is added during SPIR-V generation. Adding it to bf16 is a breaking change and requires adaptation across drivers. Spec update: intel/llvm#8175 Signed-off-by: Sidorov, Dmitry dmitry.sidorov@intel.com
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The instruction returns (Row, Column) coordinate of dynamically selected element of a matrix Updated version of the spec is here intel#8175 Instruction correctness checks will be added later among non-backward compatible changes. Signed-off-by: Sidorov, Dmitry dmitry.sidorov@intel.com Original commit: KhronosGroup/SPIRV-LLVM-Translator@dd8b217
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Mar 22, 2023
It specifies how to interpret 'Component Type' when components of a joint matrix are storages for values of different types, for example float for TF32, unsigned short for bfloat16. At this point only tf32 type interpretation is added during SPIR-V generation. Adding it to bf16 is a breaking change and requires adaptation across drivers. Spec update: intel#8175 Signed-off-by: Sidorov, Dmitry dmitry.sidorov@intel.com Original commit: KhronosGroup/SPIRV-LLVM-Translator@b7c5218
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@dpcpp-spirv-doc-reviewers should we merge this? I keep getting questions about where to find debug info spec and open pull request doesn't give enough trust :( |
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Mar 31, 2023
The patch adds TypeJointMatrixINTELv2 which maps to new type OpCode 6184. Under new OpCode matrix type no longer has Layout parameter. The patch also moved 'scope' to optional matrix muladd instruction. The changes are done only in the consumer part to prepare the switch and make E2E switch backward compatible by preparing consumers ahead of time. Unfortunately there is no way to add a test foe this unless it's binary test, but it seems to be a bit unsafe to add this, so the patch was tested localy. Spec change: intel/llvm#8175 Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
I don't mind merging this to document the current state. Based on our other conversations, it seems clear that this SPV extension will continue to evolve, though, so we should make this clear in any communication. The status in the document says "working draft", and that seems appropriate. I don't understand your comment about "debug info spec". How is debug info related to the joint_matrix extension? |
Sorry, I meant "matrix" having "debug info" (as a different task) in my mind while writing :) |
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The patch adds TypeJointMatrixINTELv2 which maps to new type OpCode 6184. Under new OpCode matrix type no longer has Layout parameter. The patch also moved 'scope' to optional matrix muladd instruction. The changes are done only in the consumer part to prepare the switch and make E2E switch backward compatible by preparing consumers ahead of time. Unfortunately there is no way to add a test foe this unless it's binary test, but it seems to be a bit unsafe to add this, so the patch was tested locally. Spec change: intel/llvm#8175 Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
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The patch adds TypeJointMatrixINTELv2 which maps to new type OpCode 6184. Under new OpCode matrix type no longer has Layout parameter. The patch also moved 'scope' to optional matrix muladd instruction. The changes are done only in the consumer part to prepare the switch and make E2E switch backward compatible by preparing consumers ahead of time. Unfortunately there is no way to add a test foe this unless it's binary test, but it seems to be a bit unsafe to add this, so the patch was tested locally. Spec change: intel#8175 Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com> Original commit: KhronosGroup/SPIRV-LLVM-Translator@a6fcade
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JointMatrixMadINTEL will stand for signed/signed Matrix type JointMatrixSUMadINTEL will stand for signed/signed Matrix type JointMatrixUSMadINTEL will stand for unsigned/signed Matrix type JointMatrixUUMadINTEL will stand for unsigned/unsigned Matrix type Spec update: intel/llvm#8175 Signed-off-by: Dmitry Sidorov dmitry.sidorov@intel.com
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Jun 19, 2023
JointMatrixMadINTEL will stand for signed/signed Matrix type JointMatrixSUMadINTEL will stand for signed/signed Matrix type JointMatrixUSMadINTEL will stand for unsigned/signed Matrix type JointMatrixUUMadINTEL will stand for unsigned/unsigned Matrix type Spec update: intel/llvm#8175 Signed-off-by: Dmitry Sidorov dmitry.sidorov@intel.com
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…sGroup#1833) JointMatrixMadINTEL will stand for signed/signed Matrix type JointMatrixSUMadINTEL will stand for signed/signed Matrix type JointMatrixUSMadINTEL will stand for unsigned/signed Matrix type JointMatrixUUMadINTEL will stand for unsigned/unsigned Matrix type Spec update: intel/llvm#8175 Signed-off-by: Dmitry Sidorov dmitry.sidorov@intel.com
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…sGroup#1833) JointMatrixMadINTEL will stand for signed/signed Matrix type JointMatrixSUMadINTEL will stand for signed/signed Matrix type JointMatrixUSMadINTEL will stand for unsigned/signed Matrix type JointMatrixUUMadINTEL will stand for unsigned/unsigned Matrix type Spec update: intel/llvm#8175 Signed-off-by: Dmitry Sidorov dmitry.sidorov@intel.com
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…sGroup#1833) JointMatrixMadINTEL will stand for signed/signed Matrix type JointMatrixSUMadINTEL will stand for signed/signed Matrix type JointMatrixUSMadINTEL will stand for unsigned/signed Matrix type JointMatrixUUMadINTEL will stand for unsigned/unsigned Matrix type Spec update: intel/llvm#8175 Signed-off-by: Dmitry Sidorov dmitry.sidorov@intel.com
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…sGroup#1833) JointMatrixMadINTEL will stand for signed/signed Matrix type JointMatrixSUMadINTEL will stand for signed/signed Matrix type JointMatrixUSMadINTEL will stand for unsigned/signed Matrix type JointMatrixUUMadINTEL will stand for unsigned/unsigned Matrix type Spec update: intel/llvm#8175 Signed-off-by: Dmitry Sidorov dmitry.sidorov@intel.com
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…sGroup#1833) JointMatrixMadINTEL will stand for signed/signed Matrix type JointMatrixSUMadINTEL will stand for signed/signed Matrix type JointMatrixUSMadINTEL will stand for unsigned/signed Matrix type JointMatrixUUMadINTEL will stand for unsigned/unsigned Matrix type Spec update: intel/llvm#8175 Signed-off-by: Dmitry Sidorov dmitry.sidorov@intel.com
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…sGroup#1833) JointMatrixMadINTEL will stand for signed/signed Matrix type JointMatrixSUMadINTEL will stand for signed/signed Matrix type JointMatrixUSMadINTEL will stand for unsigned/signed Matrix type JointMatrixUUMadINTEL will stand for unsigned/unsigned Matrix type Spec update: intel/llvm#8175 Signed-off-by: Dmitry Sidorov dmitry.sidorov@intel.com
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…sGroup#1833) JointMatrixMadINTEL will stand for signed/signed Matrix type JointMatrixSUMadINTEL will stand for signed/signed Matrix type JointMatrixUSMadINTEL will stand for unsigned/signed Matrix type JointMatrixUUMadINTEL will stand for unsigned/unsigned Matrix type Spec update: intel/llvm#8175 Signed-off-by: Dmitry Sidorov dmitry.sidorov@intel.com
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JointMatrixMadINTEL will stand for signed/signed Matrix type JointMatrixSUMadINTEL will stand for signed/signed Matrix type JointMatrixUSMadINTEL will stand for unsigned/signed Matrix type JointMatrixUUMadINTEL will stand for unsigned/unsigned Matrix type Spec update: intel/llvm#8175 Signed-off-by: Dmitry Sidorov dmitry.sidorov@intel.com
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JointMatrixMadINTEL will stand for signed/signed Matrix type JointMatrixSUMadINTEL will stand for signed/signed Matrix type JointMatrixUSMadINTEL will stand for unsigned/signed Matrix type JointMatrixUUMadINTEL will stand for unsigned/unsigned Matrix type Spec update: intel/llvm#8175 Signed-off-by: Dmitry Sidorov dmitry.sidorov@intel.com
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JointMatrixMadINTEL will stand for signed/signed Matrix type JointMatrixSUMadINTEL will stand for signed/signed Matrix type JointMatrixUSMadINTEL will stand for unsigned/signed Matrix type JointMatrixUUMadINTEL will stand for unsigned/unsigned Matrix type Spec update: intel/llvm#8175 Signed-off-by: Dmitry Sidorov dmitry.sidorov@intel.com
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The instruction returns (Row, Column) coordinate of dynamically selected element of a matrix Updated version of the spec is here intel/llvm#8175 Instruction correctness checks will be added later among non-backward compatible changes. Signed-off-by: Sidorov, Dmitry dmitry.sidorov@intel.com Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
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The instruction returns (Row, Column) coordinate of dynamically selected element of a matrix Updated version of the spec is here intel/llvm#8175 Instruction correctness checks will be added later among non-backward compatible changes. Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
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The instruction returns (Row, Column) coordinate of dynamically selected element of a matrix Updated version of the spec is here intel/llvm#8175 Instruction correctness checks will be added later among non-backward compatible changes. Signed-off-by: Sidorov, Dmitry dmitry.sidorov@intel.com Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
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The instruction returns (Row, Column) coordinate of dynamically selected element of a matrix Updated version of the spec is here intel/llvm#8175 Instruction correctness checks will be added later among non-backward compatible changes. Signed-off-by: Sidorov, Dmitry dmitry.sidorov@intel.com Signed-off-by: Sidorov, Dmitry dmitry.sidorov@intel.com Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
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The instruction returns (Row, Column) coordinate of dynamically selected element of a matrix Updated version of the spec is here intel/llvm#8175 Instruction correctness checks will be added later among non-backward compatible changes. Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
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KhronosGroup#1835) It specifies how to interpret 'Component Type' when components of a joint matrix are storages for values of different types, for example float for TF32, unsigned short for bfloat16. At this point only tf32 type interpretation is added during SPIR-V generation. Adding it to bf16 is a breaking change and requires adaptation across drivers. Spec update: intel/llvm#8175 Signed-off-by: Sidorov, Dmitry dmitry.sidorov@intel.com (cherry picked from commit b7c5218)
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…onosGroup#1935) The patch adds TypeJointMatrixINTELv2 which maps to new type OpCode 6184. Under new OpCode matrix type no longer has Layout parameter. The patch also moved 'scope' to optional matrix muladd instruction. The changes are done only in the consumer part to prepare the switch and make E2E switch backward compatible by preparing consumers ahead of time. Unfortunately there is no way to add a test foe this unless it's binary test, but it seems to be a bit unsafe to add this, so the patch was tested locally. Spec change: intel/llvm#8175 Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com> (cherry picked from commit a6fcade)
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Signed-off-by: Sidorov, Dmitry dmitry.sidorov@intel.com