[SYCL] [L0] Enable immediate command lists by default. #8982
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smaslov-intel
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Apr 10, 2023
againull
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Apr 10, 2023
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| // RUN: env SYCL_PI_LEVEL_ZERO_USE_IMMEDIATE_COMMANDLISTS=0 SYCL_PI_LEVEL_ZERO_BATCH_SIZE=0 ONEAPI_DEVICE_SELECTOR="level_zero:*" %GPU_RUN_PLACEHOLDER %t.out | ||
| // RUN: env SYCL_PI_LEVEL_ZERO_USE_IMMEDIATE_COMMANDLISTS=0 SYCL_PI_LEVEL_ZERO_BATCH_SIZE=1 ONEAPI_DEVICE_SELECTOR="level_zero:*" %GPU_RUN_PLACEHOLDER %t.out | ||
| // RUN: env SYCL_PI_LEVEL_ZERO_USE_IMMEDIATE_COMMANDLISTS=0 SYCL_PI_LEVEL_ZERO_BATCH_SIZE=2 ONEAPI_DEVICE_SELECTOR="level_zero:*" %GPU_RUN_PLACEHOLDER %t.out | ||
| // RUN: env SYCL_PI_LEVEL_ZERO_USE_IMMEDIATE_COMMANDLISTS=0 SYCL_PI_LEVEL_ZERO_BATCH_SIZE=3 ONEAPI_DEVICE_SELECTOR="level_zero:*" %GPU_RUN_PLACEHOLDER %t.out |
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Fix we discussed offline is merged: 88e7c55
Does this test still fail?
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No, but because the test depends on batching behavior which is only applicable with standard command lists, we have to explicitly set immediate command lists off.
aelovikov-intel
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Apr 10, 2023
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All the files are de-facto owned by the @intel/dpcpp-l0-pi-reviewers , @smaslov-intel LGTM should be enough. I'm giving my formal approval, but please see of CODEOWNERS file needs to be adjusted.
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Apr 24, 2023
intel#8982 Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
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intel#8982 Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
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intel#8982 Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
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intel#8982 Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
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intel#8982 Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
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