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SKL: Release v58 event files
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This commit releases SKL v58 events and updates mapfile.csv
accordingly.
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edwarddavidbaker committed Feb 5, 2024
1 parent 698f31a commit a615a90
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Showing 4 changed files with 79 additions and 56 deletions.
14 changes: 7 additions & 7 deletions SKL/events/skylake_core.json
Original file line number Diff line number Diff line change
@@ -1,9 +1,9 @@
{
"Header": {
"Copyright": "Copyright (c) 2001 - 2023 Intel Corporation. All rights reserved.",
"Info": "Performance Monitoring Events for 6th Generation Intel(R) Core(TM) Processor - V57",
"DatePublished": "06/06/2023",
"Version": "57",
"Copyright": "Copyright (c) 2001 - 2024 Intel Corporation. All rights reserved.",
"Info": "Performance Monitoring Events for 6th Generation Intel(R) Core(TM) Processor - V58",
"DatePublished": "01/09/2024",
"Version": "58",
"Legend": ""
},
"Events": [
Expand Down Expand Up @@ -2864,7 +2864,7 @@
"UMask": "0x10",
"EventName": "ITLB_MISSES.WALK_PENDING",
"BriefDescription": "Counts 1 per cycle for each PMH that is busy with a page walk for an instruction fetch request. EPT page walk duration are excluded in Skylake.",
"PublicDescription": "Counts 1 per cycle for each PMH (Page Miss Handler) that is busy with a page walk for an instruction fetch request. EPT page walk duration are excluded in Skylake michroarchitecture.",
"PublicDescription": "Counts 1 per cycle for each PMH (Page Miss Handler) that is busy with a page walk for an instruction fetch request. EPT page walk duration are excluded in Skylake microarchitecture.",
"Counter": "0,1,2,3",
"CounterHTOff": "0,1,2,3,4,5,6,7",
"SampleAfterValue": "100003",
Expand Down Expand Up @@ -4508,7 +4508,7 @@
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "1",
"PEBS": "2",
"Data_LA": "0",
"L1_Hit_Indication": "0",
"Errata": "SKL091, SKL044",
Expand Down Expand Up @@ -5934,7 +5934,7 @@
"Invert": "0",
"AnyThread": "0",
"EdgeDetect": "0",
"PEBS": "1",
"PEBS": "2",
"Data_LA": "0",
"L1_Hit_Indication": "0",
"Errata": "null",
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8 changes: 4 additions & 4 deletions SKL/events/skylake_fp_arith_inst.json
Original file line number Diff line number Diff line change
@@ -1,9 +1,9 @@
{
"Header": {
"Copyright": "Copyright (c) 2001 - 2023 Intel Corporation. All rights reserved.",
"Info": "Performance Monitoring Events for 6th Generation Intel(R) Core(TM) Processor - V57",
"DatePublished": "06/06/2023",
"Version": "57",
"Copyright": "Copyright (c) 2001 - 2024 Intel Corporation. All rights reserved.",
"Info": "Performance Monitoring Events for 6th Generation Intel(R) Core(TM) Processor - V58",
"DatePublished": "01/09/2024",
"Version": "58",
"Legend": ""
},
"Events": [
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77 changes: 50 additions & 27 deletions SKL/events/skylake_uncore.json
Original file line number Diff line number Diff line change
@@ -1,9 +1,9 @@
{
"Header": {
"Copyright": "Copyright (c) 2001 - 2023 Intel Corporation. All rights reserved.",
"Info": "Performance Monitoring Events for 6th Generation Intel(R) Core(TM) Processor - V57",
"DatePublished": "06/06/2023",
"Version": "57",
"Copyright": "Copyright (c) 2001 - 2024 Intel Corporation. All rights reserved.",
"Info": "Performance Monitoring Events for 6th Generation Intel(R) Core(TM) Processor - V58",
"DatePublished": "01/09/2024",
"Version": "58",
"Legend": ""
},
"Events": [
Expand All @@ -17,7 +17,8 @@
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
"EdgeDetect": "0",
"Deprecated": "0"
},
{
"Unit": "CBO",
Expand All @@ -29,7 +30,8 @@
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
"EdgeDetect": "0",
"Deprecated": "0"
},
{
"Unit": "CBO",
Expand All @@ -41,7 +43,8 @@
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
"EdgeDetect": "0",
"Deprecated": "0"
},
{
"Unit": "CBO",
Expand All @@ -53,7 +56,8 @@
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
"EdgeDetect": "0",
"Deprecated": "0"
},
{
"Unit": "CBO",
Expand All @@ -65,7 +69,8 @@
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
"EdgeDetect": "0",
"Deprecated": "0"
},
{
"Unit": "CBO",
Expand All @@ -77,7 +82,8 @@
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
"EdgeDetect": "0",
"Deprecated": "0"
},
{
"Unit": "CBO",
Expand All @@ -89,7 +95,8 @@
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
"EdgeDetect": "0",
"Deprecated": "0"
},
{
"Unit": "CBO",
Expand All @@ -101,7 +108,8 @@
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
"EdgeDetect": "0",
"Deprecated": "0"
},
{
"Unit": "CBO",
Expand All @@ -113,7 +121,8 @@
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
"EdgeDetect": "0",
"Deprecated": "0"
},
{
"Unit": "CBO",
Expand All @@ -125,7 +134,8 @@
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
"EdgeDetect": "0",
"Deprecated": "0"
},
{
"Unit": "CBO",
Expand All @@ -137,7 +147,8 @@
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
"EdgeDetect": "0",
"Deprecated": "0"
},
{
"Unit": "CBO",
Expand All @@ -149,7 +160,8 @@
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
"EdgeDetect": "0",
"Deprecated": "0"
},
{
"Unit": "CBO",
Expand All @@ -161,7 +173,8 @@
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
"EdgeDetect": "0",
"Deprecated": "0"
},
{
"Unit": "CBO",
Expand All @@ -173,7 +186,8 @@
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
"EdgeDetect": "0",
"Deprecated": "0"
},
{
"Unit": "ARB",
Expand All @@ -185,7 +199,8 @@
"Counter": "0",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
"EdgeDetect": "0",
"Deprecated": "0"
},
{
"Unit": "ARB",
Expand All @@ -197,7 +212,8 @@
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
"EdgeDetect": "0",
"Deprecated": "0"
},
{
"Unit": "ARB",
Expand All @@ -209,7 +225,8 @@
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
"EdgeDetect": "0",
"Deprecated": "0"
},
{
"Unit": "ARB",
Expand All @@ -221,7 +238,8 @@
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
"EdgeDetect": "0",
"Deprecated": "0"
},
{
"Unit": "ARB",
Expand All @@ -233,7 +251,8 @@
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
"EdgeDetect": "0",
"Deprecated": "0"
},
{
"Unit": "ARB",
Expand All @@ -245,7 +264,8 @@
"Counter": "0",
"CounterMask": "1",
"Invert": "0",
"EdgeDetect": "0"
"EdgeDetect": "0",
"Deprecated": "0"
},
{
"Unit": "NCU",
Expand All @@ -257,7 +277,8 @@
"Counter": "FIXED",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
"EdgeDetect": "0",
"Deprecated": "0"
},
{
"Unit": "ARB",
Expand All @@ -269,7 +290,8 @@
"Counter": "0",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
"EdgeDetect": "0",
"Deprecated": "0"
},
{
"Unit": "ARB",
Expand All @@ -281,7 +303,8 @@
"Counter": "0,1",
"CounterMask": "0",
"Invert": "0",
"EdgeDetect": "0"
"EdgeDetect": "0",
"Deprecated": "0"
}
]
}
36 changes: 18 additions & 18 deletions mapfile.csv
Original file line number Diff line number Diff line change
Expand Up @@ -65,24 +65,24 @@ GenuineIntel-6-4F,V22,/BDX/events/broadwellx_matrix.json,offcore,,,
GenuineIntel-6-4F,V22,/BDX/events/broadwellx_uncore.json,uncore,,,
GenuineIntel-6-56,V11,/BDW-DE/events/broadwellde_core.json,core,,,
GenuineIntel-6-56,V11,/BDW-DE/events/broadwellde_uncore.json,uncore,,,
GenuineIntel-6-4E,V57,/SKL/events/skylake_core.json,core,,,
GenuineIntel-6-5E,V57,/SKL/events/skylake_core.json,core,,,
GenuineIntel-6-4E,V57,/SKL/events/skylake_uncore.json,uncore,,,
GenuineIntel-6-5E,V57,/SKL/events/skylake_uncore.json,uncore,,,
GenuineIntel-6-4E,V57,/SKL/events/skylake_fp_arith_inst.json,fp_arith_inst,,,
GenuineIntel-6-5E,V57,/SKL/events/skylake_fp_arith_inst.json,fp_arith_inst,,,
GenuineIntel-6-8E,V57,/SKL/events/skylake_core.json,core,,,
GenuineIntel-6-9E,V57,/SKL/events/skylake_core.json,core,,,
GenuineIntel-6-8E,V57,/SKL/events/skylake_uncore.json,uncore,,,
GenuineIntel-6-9E,V57,/SKL/events/skylake_uncore.json,uncore,,,
GenuineIntel-6-8E,V57,/SKL/events/skylake_fp_arith_inst.json,fp_arith_inst,,,
GenuineIntel-6-9E,V57,/SKL/events/skylake_fp_arith_inst.json,fp_arith_inst,,,
GenuineIntel-6-A5,V57,/SKL/events/skylake_core.json,core,,,
GenuineIntel-6-A6,V57,/SKL/events/skylake_core.json,core,,,
GenuineIntel-6-A5,V57,/SKL/events/skylake_uncore.json,uncore,,,
GenuineIntel-6-A6,V57,/SKL/events/skylake_uncore.json,uncore,,,
GenuineIntel-6-A5,V57,/SKL/events/skylake_fp_arith_inst.json,fp_arith_inst,,,
GenuineIntel-6-A6,V57,/SKL/events/skylake_fp_arith_inst.json,fp_arith_inst,,,
GenuineIntel-6-4E,V58,/SKL/events/skylake_core.json,core,,,
GenuineIntel-6-5E,V58,/SKL/events/skylake_core.json,core,,,
GenuineIntel-6-4E,V58,/SKL/events/skylake_uncore.json,uncore,,,
GenuineIntel-6-5E,V58,/SKL/events/skylake_uncore.json,uncore,,,
GenuineIntel-6-4E,V58,/SKL/events/skylake_fp_arith_inst.json,fp_arith_inst,,,
GenuineIntel-6-5E,V58,/SKL/events/skylake_fp_arith_inst.json,fp_arith_inst,,,
GenuineIntel-6-8E,V58,/SKL/events/skylake_core.json,core,,,
GenuineIntel-6-9E,V58,/SKL/events/skylake_core.json,core,,,
GenuineIntel-6-8E,V58,/SKL/events/skylake_uncore.json,uncore,,,
GenuineIntel-6-9E,V58,/SKL/events/skylake_uncore.json,uncore,,,
GenuineIntel-6-8E,V58,/SKL/events/skylake_fp_arith_inst.json,fp_arith_inst,,,
GenuineIntel-6-9E,V58,/SKL/events/skylake_fp_arith_inst.json,fp_arith_inst,,,
GenuineIntel-6-A5,V58,/SKL/events/skylake_core.json,core,,,
GenuineIntel-6-A6,V58,/SKL/events/skylake_core.json,core,,,
GenuineIntel-6-A5,V58,/SKL/events/skylake_uncore.json,uncore,,,
GenuineIntel-6-A6,V58,/SKL/events/skylake_uncore.json,uncore,,,
GenuineIntel-6-A5,V58,/SKL/events/skylake_fp_arith_inst.json,fp_arith_inst,,,
GenuineIntel-6-A6,V58,/SKL/events/skylake_fp_arith_inst.json,fp_arith_inst,,,
GenuineIntel-6-57,V16,/KNL/events/knightslanding_core.json,core,,,
GenuineIntel-6-57,V16,/KNL/events/knightslanding_matrix.json,offcore,,,
GenuineIntel-6-57,V16,/KNL/events/knightslanding_uncore.json,uncore,,,
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