Merge pull request #135 from edwarddavidbaker/sync-platforms

EMR: Release event updates
intel · Jan 24, 2024 · ece4051 · ece4051
2 parents 480ed26 + c7c6f72
commit ece4051
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Showing 4 changed files with 339 additions and 15 deletions.
diff --git a/EMR/events/emeraldrapids_core.json b/EMR/events/emeraldrapids_core.json
@@ -1,9 +1,9 @@
 {
   "Header": {
-    "Copyright": "Copyright (c) 2001 - 2023 Intel Corporation. All rights reserved.",
-    "Info": "Performance Monitoring Events for 5th Generation Intel(R) Xeon(R) Processor Scalable Family - V1.02",
-    "DatePublished": "11/29/2023",
-    "Version": "1.02",
+    "Copyright": "Copyright (c) 2001 - 2024 Intel Corporation. All rights reserved.",
+    "Info": "Performance Monitoring Events for 5th Generation Intel(R) Xeon(R) Processor Scalable Family - V1.03",
+    "DatePublished": "01/19/2024",
+    "Version": "1.03",
     "Legend": ""
   },
   "Events": [

diff --git a/EMR/events/emeraldrapids_uncore.json b/EMR/events/emeraldrapids_uncore.json
@@ -1,9 +1,9 @@
 {
   "Header": {
-    "Copyright": "Copyright (c) 2001 - 2023 Intel Corporation. All rights reserved.",
-    "Info": "Performance Monitoring Events for 5th Generation Intel(R) Xeon(R) Processor Scalable Family - V1.02",
-    "DatePublished": "11/29/2023",
-    "Version": "1.02",
+    "Copyright": "Copyright (c) 2001 - 2024 Intel Corporation. All rights reserved.",
+    "Info": "Performance Monitoring Events for 5th Generation Intel(R) Xeon(R) Processor Scalable Family - V1.03",
+    "DatePublished": "01/19/2024",
+    "Version": "1.03",
     "Legend": ""
   },
   "Events": [

diff --git a/EMR/events/emeraldrapids_uncore_experimental.json b/EMR/events/emeraldrapids_uncore_experimental.json
@@ -1,9 +1,9 @@
 {
   "Header": {
-    "Copyright": "Copyright (c) 2001 - 2023 Intel Corporation. All rights reserved.",
-    "Info": "Performance Monitoring Events for 5th Generation Intel(R) Xeon(R) Processor Scalable Family - V1.02",
-    "DatePublished": "11/29/2023",
-    "Version": "1.02",
+    "Copyright": "Copyright (c) 2001 - 2024 Intel Corporation. All rights reserved.",
+    "Info": "Performance Monitoring Events for 5th Generation Intel(R) Xeon(R) Processor Scalable Family - V1.03",
+    "DatePublished": "01/19/2024",
+    "Version": "1.03",
     "Legend": ""
   },
   "Events": [
@@ -79,6 +79,330 @@
       "FILTER_VALUE": "0",
       "CounterType": "PGMABLE"
     },
+    {
+      "Unit": "CHA",
+      "EventCode": "0x36",
+      "UMask": "0x40",
+      "PortMask": "0x00",
+      "FCMask": "0x00",
+      "UMaskExt": "0x20E80682",
+      "EventName": "UNC_CHA_TOR_OCCUPANCY.RRQ_MISS_RDCUR_CXL_EXP_LOCAL",
+      "BriefDescription": "TOR Occupancy for RDCUR opcodes received from a remote socket which miss the L3 and target memory in a CXL type 3 memory expander local to this socket.",
+      "PublicDescription": "TOR Occupancy for RDCUR opcodes received from a remote socket which miss the L3 and target memory in a CXL type 3 memory expander local to this socket.",
+      "Counter": "0",
+      "ELLC": "0",
+      "Filter": "na",
+      "ExtSel": "0",
+      "Deprecated": "0",
+      "FILTER_VALUE": "0",
+      "CounterType": "PGMABLE"
+    },
+    {
+      "Unit": "CHA",
+      "EventCode": "0x36",
+      "UMask": "0x40",
+      "PortMask": "0x00",
+      "FCMask": "0x00",
+      "UMaskExt": "0x20E80E82",
+      "EventName": "UNC_CHA_TOR_OCCUPANCY.RRQ_MISS_RDCODE_CXL_EXP_LOCAL",
+      "BriefDescription": "TOR Occupancy for RDCODE opcodes received from a remote socket which miss the L3 and target memory in a CXL type 3 memory expander local to this socket.",
+      "PublicDescription": "TOR Occupancy for RDCODE opcodes received from a remote socket which miss the L3 and target memory in a CXL type 3 memory expander local to this socket.",
+      "Counter": "0",
+      "ELLC": "0",
+      "Filter": "na",
+      "ExtSel": "0",
+      "Deprecated": "0",
+      "FILTER_VALUE": "0",
+      "CounterType": "PGMABLE"
+    },
+    {
+      "Unit": "CHA",
+      "EventCode": "0x36",
+      "UMask": "0x40",
+      "PortMask": "0x00",
+      "FCMask": "0x00",
+      "UMaskExt": "0x20E81682",
+      "EventName": "UNC_CHA_TOR_OCCUPANCY.RRQ_MISS_RDDATA_CXL_EXP_LOCAL",
+      "BriefDescription": "TOR Occupancy for RDDATA opcodes received from a remote socket which miss the L3 and target memory in a CXL type 3 memory expander local to this socket.",
+      "PublicDescription": "TOR Occupancy for RDDATA opcodes received from a remote socket which miss the L3 and target memory in a CXL type 3 memory expander local to this socket.",
+      "Counter": "0",
+      "ELLC": "0",
+      "Filter": "na",
+      "ExtSel": "0",
+      "Deprecated": "0",
+      "FILTER_VALUE": "0",
+      "CounterType": "PGMABLE"
+    },
+    {
+      "Unit": "CHA",
+      "EventCode": "0x36",
+      "UMask": "0x40",
+      "PortMask": "0x00",
+      "FCMask": "0x00",
+      "UMaskExt": "0x20E82682",
+      "EventName": "UNC_CHA_TOR_OCCUPANCY.RRQ_MISS_RDINVOWN_OPT_CXL_EXP_LOCAL",
+      "BriefDescription": "TOR Occupancy for RDINVOWN_OPT opcodes received from a remote socket which miss the L3 and target memory in a CXL type 3 memory expander local to this socket.",
+      "PublicDescription": "TOR Occupancy for RDINVOWN_OPT opcodes received from a remote socket which miss the L3 and target memory in a CXL type 3 memory expander local to this socket.",
+      "Counter": "0",
+      "ELLC": "0",
+      "Filter": "na",
+      "ExtSel": "0",
+      "Deprecated": "0",
+      "FILTER_VALUE": "0",
+      "CounterType": "PGMABLE"
+    },
+    {
+      "Unit": "CHA",
+      "EventCode": "0x36",
+      "UMask": "0x40",
+      "PortMask": "0x00",
+      "FCMask": "0x00",
+      "UMaskExt": "0x20E87E82",
+      "EventName": "UNC_CHA_TOR_OCCUPANCY.RRQ_MISS_INVXTOM_CXL_EXP_LOCAL",
+      "BriefDescription": "TOR Occupancy for INVXTOM opcodes received from a remote socket which miss the L3 and target memory in a CXL type 3 memory expander local to this socket.",
+      "PublicDescription": "TOR Occupancy for INVXTOM opcodes received from a remote socket which miss the L3 and target memory in a CXL type 3 memory expander local to this socket.",
+      "Counter": "0",
+      "ELLC": "0",
+      "Filter": "na",
+      "ExtSel": "0",
+      "Deprecated": "0",
+      "FILTER_VALUE": "0",
+      "CounterType": "PGMABLE"
+    },
+    {
+      "Unit": "CHA",
+      "EventCode": "0x35",
+      "UMask": "0x40",
+      "PortMask": "0x00",
+      "FCMask": "0x00",
+      "UMaskExt": "0x20E80682",
+      "EventName": "UNC_CHA_TOR_INSERTS.RRQ_MISS_RDCUR_CXL_EXP_LOCAL",
+      "BriefDescription": "TOR Inserts for RDCUR opcodes received from a remote socket which miss the L3 and target memory in a CXL type 3 memory expander local to this socket.",
+      "PublicDescription": "TOR Inserts for RDCUR opcodes received from a remote socket which miss the L3 and target memory in a CXL type 3 memory expander local to this socket.",
+      "Counter": "0,1,2,3",
+      "ELLC": "0",
+      "Filter": "na",
+      "ExtSel": "0",
+      "Deprecated": "0",
+      "FILTER_VALUE": "0",
+      "CounterType": "PGMABLE"
+    },
+    {
+      "Unit": "CHA",
+      "EventCode": "0x35",
+      "UMask": "0x40",
+      "PortMask": "0x00",
+      "FCMask": "0x00",
+      "UMaskExt": "0x20E80E82",
+      "EventName": "UNC_CHA_TOR_INSERTS.RRQ_MISS_RDCODE_CXL_EXP_LOCAL",
+      "BriefDescription": "TOR Inserts for RDCODE opcodes received from a remote socket which miss the L3 and target memory in a CXL type 3 memory expander local to this socket.",
+      "PublicDescription": "TOR Inserts for RDCODE opcodes received from a remote socket which miss the L3 and target memory in a CXL type 3 memory expander local to this socket.",
+      "Counter": "0,1,2,3",
+      "ELLC": "0",
+      "Filter": "na",
+      "ExtSel": "0",
+      "Deprecated": "0",
+      "FILTER_VALUE": "0",
+      "CounterType": "PGMABLE"
+    },
+    {
+      "Unit": "CHA",
+      "EventCode": "0x35",
+      "UMask": "0x40",
+      "PortMask": "0x00",
+      "FCMask": "0x00",
+      "UMaskExt": "0x20E81682",
+      "EventName": "UNC_CHA_TOR_INSERTS.RRQ_MISS_RDDATA_CXL_EXP_LOCAL",
+      "BriefDescription": "TOR Inserts for RDDATA opcodes received from a remote socket which miss the L3 and target memory in a CXL type 3 memory expander local to this socket.",
+      "PublicDescription": "TOR Inserts for RDDATA opcodes received from a remote socket which miss the L3 and target memory in a CXL type 3 memory expander local to this socket.",
+      "Counter": "0,1,2,3",
+      "ELLC": "0",
+      "Filter": "na",
+      "ExtSel": "0",
+      "Deprecated": "0",
+      "FILTER_VALUE": "0",
+      "CounterType": "PGMABLE"
+    },
+    {
+      "Unit": "CHA",
+      "EventCode": "0x35",
+      "UMask": "0x40",
+      "PortMask": "0x00",
+      "FCMask": "0x00",
+      "UMaskExt": "0x20E82682",
+      "EventName": "UNC_CHA_TOR_INSERTS.RRQ_MISS_RDINVOWN_OPT_CXL_EXP_LOCAL",
+      "BriefDescription": "TOR Inserts for RDINVOWN_OPT opcodes received from a remote socket which miss the L3 and target memory in a CXL type 3 memory expander local to this socket.",
+      "PublicDescription": "TOR Inserts for RDINVOWN_OPT opcodes received from a remote socket which miss the L3 and target memory in a CXL type 3 memory expander local to this socket.",
+      "Counter": "0,1,2,3",
+      "ELLC": "0",
+      "Filter": "na",
+      "ExtSel": "0",
+      "Deprecated": "0",
+      "FILTER_VALUE": "0",
+      "CounterType": "PGMABLE"
+    },
+    {
+      "Unit": "CHA",
+      "EventCode": "0x35",
+      "UMask": "0x40",
+      "PortMask": "0x00",
+      "FCMask": "0x00",
+      "UMaskExt": "0x20E87E82",
+      "EventName": "UNC_CHA_TOR_INSERTS.RRQ_MISS_INVXTOM_CXL_EXP_LOCAL",
+      "BriefDescription": "TOR Inserts for INVXTOM opcodes received from a remote socket which miss the L3 and target memory in a CXL type 3 memory expander local to this socket.",
+      "PublicDescription": "TOR Inserts for INVXTOM opcodes received from a remote socket which miss the L3 and target memory in a CXL type 3 memory expander local to this socket.",
+      "Counter": "0,1,2,3",
+      "ELLC": "0",
+      "Filter": "na",
+      "ExtSel": "0",
+      "Deprecated": "0",
+      "FILTER_VALUE": "0",
+      "CounterType": "PGMABLE"
+    },
+    {
+      "Unit": "CHA",
+      "EventCode": "0x35",
+      "UMask": "0x01",
+      "PortMask": "0x000",
+      "FCMask": "0x00",
+      "UMaskExt": "0x20CCD682",
+      "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA_CXL_EXP_LOCAL",
+      "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA_CXL_EXP_LOCAL",
+      "PublicDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA_CXL_EXP_LOCAL",
+      "Counter": "0,1,2,3",
+      "ELLC": "0",
+      "Filter": "na",
+      "ExtSel": "0",
+      "Deprecated": "0",
+      "FILTER_VALUE": "0",
+      "CounterType": "PGMABLE"
+    },
+    {
+      "Unit": "CHA",
+      "EventCode": "0x35",
+      "UMask": "0x01",
+      "PortMask": "0x000",
+      "FCMask": "0x00",
+      "UMaskExt": "0x20C88682",
+      "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFRFO_CXL_EXP_LOCAL",
+      "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFRFO_CXL_EXP_LOCAL",
+      "PublicDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFRFO_CXL_EXP_LOCAL",
+      "Counter": "0,1,2,3",
+      "ELLC": "0",
+      "Filter": "na",
+      "ExtSel": "0",
+      "Deprecated": "0",
+      "FILTER_VALUE": "0",
+      "CounterType": "PGMABLE"
+    },
+    {
+      "Unit": "CHA",
+      "EventCode": "0x36",
+      "UMask": "0x01",
+      "PortMask": "0x000",
+      "FCMask": "0x00",
+      "UMaskExt": "0x20CCD682",
+      "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFDATA_CXL_EXP_LOCAL",
+      "BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFDATA_CXL_EXP_LOCAL",
+      "PublicDescription": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFDATA_CXL_EXP_LOCAL",
+      "Counter": "0",
+      "ELLC": "0",
+      "Filter": "na",
+      "ExtSel": "0",
+      "Deprecated": "0",
+      "FILTER_VALUE": "0",
+      "CounterType": "PGMABLE"
+    },
+    {
+      "Unit": "CHA",
+      "EventCode": "0x36",
+      "UMask": "0x01",
+      "PortMask": "0x000",
+      "FCMask": "0x00",
+      "UMaskExt": "0x20C88682",
+      "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFRFO_CXL_EXP_LOCAL",
+      "BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFRFO_CXL_EXP_LOCAL",
+      "PublicDescription": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_LLCPREFRFO_CXL_EXP_LOCAL",
+      "Counter": "0",
+      "ELLC": "0",
+      "Filter": "na",
+      "ExtSel": "0",
+      "Deprecated": "0",
+      "FILTER_VALUE": "0",
+      "CounterType": "PGMABLE"
+    },
+    {
+      "Unit": "CHA",
+      "EventCode": "0x35",
+      "UMask": "0x01",
+      "PortMask": "0x000",
+      "FCMask": "0x00",
+      "UMaskExt": "0x20CCC682",
+      "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_CXL_EXP_LOCAL",
+      "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_CXL_EXP_LOCAL",
+      "PublicDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF_CXL_EXP_LOCAL",
+      "Counter": "0,1,2,3",
+      "ELLC": "0",
+      "Filter": "na",
+      "ExtSel": "0",
+      "Deprecated": "0",
+      "FILTER_VALUE": "0",
+      "CounterType": "PGMABLE"
+    },
+    {
+      "Unit": "CHA",
+      "EventCode": "0x36",
+      "UMask": "0x01",
+      "PortMask": "0x000",
+      "FCMask": "0x00",
+      "UMaskExt": "0x20CCC682",
+      "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF_CXL_EXP_LOCAL",
+      "BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF_CXL_EXP_LOCAL",
+      "PublicDescription": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO_PREF_CXL_EXP_LOCAL",
+      "Counter": "0",
+      "ELLC": "0",
+      "Filter": "na",
+      "ExtSel": "0",
+      "Deprecated": "0",
+      "FILTER_VALUE": "0",
+      "CounterType": "PGMABLE"
+    },
+    {
+      "Unit": "CHA",
+      "EventCode": "0x35",
+      "UMask": "0x01",
+      "PortMask": "0x000",
+      "FCMask": "0x00",
+      "UMaskExt": "0x20C89682",
+      "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_CXL_EXP_LOCAL",
+      "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_CXL_EXP_LOCAL",
+      "PublicDescription": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_CXL_EXP_LOCAL",
+      "Counter": "0,1,2,3",
+      "ELLC": "0",
+      "Filter": "na",
+      "ExtSel": "0",
+      "Deprecated": "0",
+      "FILTER_VALUE": "0",
+      "CounterType": "PGMABLE"
+    },
+    {
+      "Unit": "CHA",
+      "EventCode": "0x36",
+      "UMask": "0x01",
+      "PortMask": "0x000",
+      "FCMask": "0x00",
+      "UMaskExt": "0x20C89682",
+      "EventName": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_CXL_EXP_LOCAL",
+      "BriefDescription": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_CXL_EXP_LOCAL",
+      "PublicDescription": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PREF_CXL_EXP_LOCAL",
+      "Counter": "0",
+      "ELLC": "0",
+      "Filter": "na",
+      "ExtSel": "0",
+      "Deprecated": "0",
+      "FILTER_VALUE": "0",
+      "CounterType": "PGMABLE"
+    },
     {
       "Unit": "UBOX",
       "EventCode": "0x42",

diff --git a/mapfile.csv b/mapfile.csv
@@ -118,9 +118,9 @@ GenuineIntel-6-8D,V1.15,/TGL/events/tigerlake_uncore_experimental.json,uncore ex
 GenuineIntel-6-8F,V1.17,/SPR/events/sapphirerapids_core.json,core,,,
 GenuineIntel-6-8F,V1.17,/SPR/events/sapphirerapids_uncore.json,uncore,,,
 GenuineIntel-6-8F,V1.17,/SPR/events/sapphirerapids_uncore_experimental.json,uncore experimental,,,
-GenuineIntel-6-CF,V1.02,/EMR/events/emeraldrapids_core.json,core,,,
-GenuineIntel-6-CF,V1.02,/EMR/events/emeraldrapids_uncore.json,uncore,,,
-GenuineIntel-6-CF,V1.02,/EMR/events/emeraldrapids_uncore_experimental.json,uncore experimental,,,
+GenuineIntel-6-CF,V1.03,/EMR/events/emeraldrapids_core.json,core,,,
+GenuineIntel-6-CF,V1.03,/EMR/events/emeraldrapids_uncore.json,uncore,,,
+GenuineIntel-6-CF,V1.03,/EMR/events/emeraldrapids_uncore_experimental.json,uncore experimental,,,
 GenuineIntel-6-6A,V1.23,/ICX/events/icelakex_core.json,core,,,
 GenuineIntel-6-6A,V1.23,/ICX/events/icelakex_uncore.json,uncore,,,
 GenuineIntel-6-6A,V1.23,/ICX/events/icelakex_uncore_experimental.json,uncore experimental,,,