SPI multiple subs functionality. #189
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| @@ -33,6 +33,7 @@ class SpiMain extends Module { | |||
| required Logic reset, | |||
| required Logic start, | |||
| required Logic busIn, | |||
| Logic? css, | |||
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add documentation for what css is
| @@ -50,11 +55,15 @@ class SpiMain extends Module { | |||
| ..pairConnectIO(this, intf, PairRole.provider); | |||
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| final isRunning = Logic(name: 'isRunning'); | |||
| final active = Logic(name: 'enable'); | |||
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did you mean to call this "active"?
| @@ -34,6 +34,7 @@ class SpiSub extends Module { | |||
| {required SpiInterface intf, | |||
| Logic? busIn, | |||
| Logic? reset, | |||
| bool triStateOutput = false, | |||
| asyncReset: true, | ||
| resetValue: busIn?[-1]); | ||
| // flop data from shift register dataOut. | ||
| final flopDataOut = FlipFlop(~intf.sclk, shiftReg.dataOut, |
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nit: why not keep it as a flop like it was?
| @@ -14,26 +14,31 @@ class SpiInterface extends PairInterface { | |||
| /// The data length for serial transmissions on this interface. | |||
| final int dataLength; | |||
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| /// The number of Chip Select signals in this interface. | |||
| final int multiChipSelects; | |||
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why no numChipSelects or something?
| @@ -243,6 +243,167 @@ class SpiPairTest extends Test { | |||
| } | |||
| } | |||
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| class SpiMultiSubTest extends Test { | |||
| late final SpiInterface intfMain; | |||
| late final SpiInterface intfSubA; | |||
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suggestion: might be better to make this a List<SpiInterface> to reduce the copy-paste for A,B,C,D? And List<SpiSub> etc.
| @@ -38,7 +38,7 @@ class SpiMainDriver extends PendingClockedDriver<SpiPacket> { | |||
| unawaited(super.run(phase)); | |||
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| Simulator.injectAction(() { | |||
| intf.csb.put(1); | |||
| intf.csb[0].put(1); | |||
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this is incomplete on the BFM side, right? we need ways to drive different CSB's, not just always 0
| @@ -34,6 +34,7 @@ class SpiSub extends Module { | |||
| {required SpiInterface intf, | |||
| Logic? busIn, | |||
| Logic? reset, | |||
| bool triStateOutput = false, | |||
| super.name = 'spiSub'}) { | |||
| // SPI Interface | |||
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should we add validation that the interface always has 1 CS?
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should we add validation that the interface always has 1 CS?
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does the SPI checker need updating as well?
Description & Motivation
Add ability for main to have multiple chip selects and sub to tristate its outputs. Allowing for multidrop configurations in SPI.
Related Issue(s)
#158
Testing
Unit tests for multiple sub configurations.
Backwards-compatibility
Documentation