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Add riscv architectures #16

Merged
merged 1 commit into from
Nov 16, 2019
Merged

Add riscv architectures #16

merged 1 commit into from
Nov 16, 2019

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laanwj
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@laanwj laanwj commented Nov 4, 2019

Add riscv32 and riscv64. Both have 32-bit int, and unsigned chars.

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Add riscv architectures
1086ef4 
Add `riscv32` and `riscv64`. Both have 32-bit int, and unsigned chars.
@laanwj laanwj mentioned this pull request Nov 4, 2019
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japaric commented Nov 16, 2019

Thanks!

bors r+

bors bot added a commit that referenced this pull request Nov 16, 2019
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Merge #16
9ea45ac 
16: Add riscv architectures r=japaric a=laanwj

Add `riscv32` and `riscv64`. Both have 32-bit int, and unsigned chars.

Co-authored-by: Wladimir J. van der Laan <laanwj@protonmail.com>
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bors bot commented Nov 16, 2019

Build succeeded

@bors bors bot merged commit 1086ef4 into japaric:master Nov 16, 2019
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@laanwj @japaric