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Adding more test points
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jatin-bhateja committed Dec 16, 2024
1 parent 7cb694f commit 3a6697e
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Showing 3 changed files with 54 additions and 2 deletions.
10 changes: 10 additions & 0 deletions src/hotspot/cpu/x86/x86.ad
Original file line number Diff line number Diff line change
Expand Up @@ -10901,6 +10901,16 @@ instruct convF2HFAndS2HF(regF dst, regF src)
ins_pipe(pipe_slow);
%}

instruct convHF2SAndHF2F(regF dst, regF src)
%{
match(Set dst (ConvHF2F (ReinterpretHF2S src)));
format %{ "convHF2SAndHF2F $dst, $src" %}
ins_encode %{
__ vcvtph2ps($dst$$XMMRegister, $src$$XMMRegister, Assembler::AVX_128bit);
%}
ins_pipe(pipe_slow);
%}

instruct reinterpretHF2S(rRegI dst, regF src)
%{
match(Set dst (ReinterpretHF2S src));
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Original file line number Diff line number Diff line change
Expand Up @@ -43,6 +43,8 @@ public class TestFloat16ScalarOperations {
private short[] dst;
private short res;

private static final Float16 ONE = valueOf(1.0f);
private static final Float16 MONE = valueOf(-1.0f);
private static final Float16 POSITIVE_ZERO = valueOf(0.0f);
private static final Float16 NEGATIVE_ZERO = valueOf(-0.0f);
private static final Float16 MIN_NORMAL = valueOf(0x1.0P-14f);
Expand Down Expand Up @@ -81,6 +83,19 @@ static void assertResult(float actual, float expected, String msg, int iter) {
}
}

@Test
@IR(counts = {"convHF2SAndHF2F", " >0 "}, phase = {CompilePhase.FINAL_CODE},
applyIfCPUFeature = {"avx512_fp16", "true"})
public void testEliminateIntermediateHF2S() {
Float16 res = shortBitsToFloat16((short)0);
for (int i = 0; i < count; i++) {
// Intermediate HF2S + S2HF is eliminated in following transformation
// AddHF S2HF(HF2S (AddHF S2HF(src[i]), S2HF(0))), S2HF(src[i]) => AddHF (AddHF S2HF(src[i]), S2HF(0)), S2HF(src[i])
res = add(add(res, shortBitsToFloat16(src[i])), shortBitsToFloat16(src[i]));
dst[i] = (short)res.floatValue();
}
}

@Test
@IR(counts = {IRNode.ADD_HF, " >0 ", IRNode.REINTERPRET_S2HF, " >0 ", IRNode.REINTERPRET_HF2S, " >0 "},
applyIfCPUFeature = {"avx512_fp16", "true"})
Expand Down Expand Up @@ -137,6 +152,17 @@ public void testDiv() {
}
}

@Test
@IR(counts = {IRNode.DIV_HF, " 0 ", IRNode.REINTERPRET_S2HF, " 0 ", IRNode.REINTERPRET_HF2S, " 0 "},
applyIfCPUFeature = {"avx512_fp16", "true"})
public void testDivByOne() {
Float16 res = shortBitsToFloat16((short)0);
for (int i = 0; i < count; i++) {
res = Float16.divide(shortBitsToFloat16(src[i]), ONE);
dst[i] = float16ToRawShortBits(res);
}
}

@Test
@IR(counts = {IRNode.MAX_HF, " >0 ", IRNode.REINTERPRET_S2HF, " >0 ", IRNode.REINTERPRET_HF2S, " >0 "},
applyIfCPUFeature = {"avx512_fp16", "true"})
Expand Down Expand Up @@ -417,6 +443,24 @@ public void testMulConstantFolding() {
assertResult(multiply(multiply(multiply(valueOf(1.0f), valueOf(2.0f)), valueOf(3.0f)), valueOf(4.0f)).floatValue(), 1.0f * 2.0f * 3.0f * 4.0f, "testMulConstantFolding");
}

@Test
@IR(counts = {IRNode.SQRT_HF, " 0 ", IRNode.REINTERPRET_S2HF, " 0 ", IRNode.REINTERPRET_HF2S, " 0 "},
applyIfCPUFeature = {"avx512_fp16", "true"})
public void testSqrtConstantFolding() {
// If the argument is NaN or less than zero, then the result is NaN.
assertResult(sqrt(Float16.NaN).floatValue(), Float.NaN, "testSqrtConstantFolding");

// If the argument is positive infinity, then the result is positive infinity.
assertResult(sqrt(Float16.POSITIVE_INFINITY).floatValue(), Float.POSITIVE_INFINITY, "testSqrtConstantFolding");

// If the argument is positive zero or negative zero, then the result is the same as the argument.
assertResult(sqrt(POSITIVE_ZERO).floatValue(), 0.0f, "testSqrtConstantFolding");
assertResult(sqrt(NEGATIVE_ZERO).floatValue(), -0.0f, "testSqrtConstantFolding");

// Other cases.
assertResult(Math.round(sqrt(valueOf(0x1.ffcP+14f)).floatValue()), Math.round(Math.sqrt(0x1.ffcP+14f)), "testSqrtConstantFolding");
}

@Test
@IR(counts = {IRNode.FMA_HF, " 0 ", IRNode.REINTERPRET_S2HF, " 0 ", IRNode.REINTERPRET_HF2S, " 0 "},
applyIfCPUFeature = {"avx512_fp16", "true"})
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Original file line number Diff line number Diff line change
Expand Up @@ -108,8 +108,6 @@ public class IREncodingPrinter {
"sha3",
"asimd",
"sve",
"fphp",
"asimdhp",
// Riscv64
"rvv",
"zvbb",
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