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Configure berylline to use raytac dongle
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config BOARD_ENABLE_DCDC | ||
bool "Enable DCDC mode" | ||
select SOC_DCDC_NRF52X | ||
default y |
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config BOARD_RAYTAC_MDBT50Q_RX | ||
bool "Raytac MDBT50Q-RX" | ||
depends on SOC_NRF52840_QIAA |
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config/boards/shields/arm/raytac_mdbt50q_rx/Kconfig.defconfig
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if BOARD_RAYTAC_MDBT50Q_RX | ||
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config BOARD | ||
default "Raytac MDBT50Q-RX" | ||
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if USB | ||
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config USB_NRFX | ||
default y | ||
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config USB_DEVICE_STACK | ||
default y | ||
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endif # USB | ||
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config BT_CTLR | ||
default BT | ||
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endif # BOARD_RAYTAC_MDBT50Q_RX |
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config/boards/shields/arm/raytac_mdbt50q_rx/raytac_mdbt50q_rx.dts
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/dts-v1/; | ||
#include <nordic/nrf52840_qiaa.dtsi> | ||
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/ { | ||
model = "Raytac MDBT50Q-RX"; | ||
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chosen { | ||
zephyr,code-partition = &code_partition; | ||
zephyr,sram = &sram0; | ||
zephyr,flash = &flash0; | ||
zephyr,console = &cdc_acm_uart; | ||
}; | ||
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kscan0: kscan { | ||
compatible = "zmk,kscan-gpio-direct"; | ||
label = "KSCAN"; | ||
input-gpios = <&gpio0 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; | ||
}; | ||
}; | ||
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&adc { | ||
status = "okay"; | ||
}; | ||
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&gpiote { | ||
status = "okay"; | ||
}; | ||
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&gpio0 { | ||
status = "okay"; | ||
}; | ||
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&gpio1 { | ||
status = "okay"; | ||
}; | ||
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&usbd { | ||
status = "okay"; | ||
cdc_acm_uart: cdc_acm_uart { | ||
compatible = "zephyr,cdc-acm-uart"; | ||
label = "CDC_ACM_0"; | ||
}; | ||
}; | ||
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&flash0 { | ||
partitions { | ||
compatible = "fixed-partitions"; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
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// Application starts at 0x1000 after the MBR. | ||
code_partition: partition@1000 { | ||
label = "code_partition"; | ||
reg = <0x00001000 0x000ec000>; | ||
}; | ||
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// Define storage partition before the bootloader, which starts at | ||
// 0xf4000. Only 7 pages is allocated for storage since that's the | ||
// default on the older Adafruit bootloader that these dongles are | ||
// preloaded with. | ||
storage_partition: partition@ed000 { | ||
label = "storage"; | ||
reg = <0x000ed000 0x00007000>; | ||
}; | ||
}; | ||
}; |
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config/boards/shields/arm/raytac_mdbt50q_rx/raytac_mdbt50q_rx_defconfig
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CONFIG_SOC_SERIES_NRF52X=y | ||
CONFIG_SOC_NRF52840_QIAA=y | ||
CONFIG_BOARD_RAYTAC_MDBT50Q_RX=y | ||
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# Follow DeviceTree partition. | ||
CONFIG_USE_DT_CODE_PARTITION=y | ||
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# Build UF2 firmware. | ||
CONFIG_BUILD_OUTPUT_UF2=y | ||
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# Enable MPU. | ||
CONFIG_ARM_MPU=y | ||
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# Enable hardware stack protection. | ||
CONFIG_HW_STACK_PROTECTION=y | ||
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# Enable basic functionality. | ||
CONFIG_ADC=y | ||
CONFIG_GPIO=y | ||
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# Use NVS for settings. | ||
CONFIG_MPU_ALLOW_FLASH_WRITE=y | ||
CONFIG_NVS=y | ||
CONFIG_SETTINGS_NVS=y | ||
CONFIG_FLASH=y | ||
CONFIG_FLASH_PAGE_LAYOUT=y | ||
CONFIG_FLASH_MAP=y | ||
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# Set NVS sector count to reflect storage partition size. | ||
CONFIG_SETTINGS_NVS_SECTOR_COUNT=7 | ||
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# Use maximum Bluetooth transmit power. | ||
CONFIG_BT_CTLR_TX_PWR_PLUS_8=y | ||
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# Include support for Coded PHY. | ||
CONFIG_BT_CTLR_PHY_CODED=y |
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CONFIG_ZMK_SPLIT_BLE_CENTRAL_PERIPHERALS=2 |
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/* | ||
* Copyright (c) 2023 The ZMK Contributors | ||
* | ||
* SPDX-License-Identifier: MIT | ||
*/ | ||
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#include "berylline03.dtsi" |