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Verilog HDL

Making best use of online resource to learn more about Verilog.

Abstract

This Repository is for self development and usage of code for developing further more modules. Most of the coding styles are designed by Prof.Indranil Sengupta (Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur) and big shout out to NPTEL for providing this course playlist for free to every verilog enthusiast students.

Deployment

To deploy this Iverilog to run simulation

  iverilog -o <name of the file>.vvp <name of the file>.v

To deploy the vvp file

  vvp <name of the file>.vvp

To run Waveform simulation in GTKWave

  gtkwave 

Open Source Software's

Iverilog: Icarus Verilog is intended to compile ALL of the Verilog HDL, as described in the IEEE-1364 standard. Of course, it's not quite there yet. It does currently handle a mix of structural and behavioural constructs. For a view of the current state of Icarus Verilog, see its home page at https://steveicarus.github.io/iverilog/.

Icarus Verilog is not aimed at being a simulator in the traditional sense, but a compiler that generates code employed by back-end tools.

GTKWave: GTKWave is the best free wave viewer and is the recommended viewer by Icarus Verilog simulation tool. The GTKWave software is used as a simulation tool to verify the Verilog design code through a testbench.

Acknowledgements

Icarus_Verilog

GTKWave

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