mips: encode relative address for B. see issue #108

keystone-engine · May 27, 2016 · 9c93aaa · 9c93aaa
1 parent b4ef066
commit 9c93aaa
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Showing 2 changed files with 13 additions and 5 deletions.
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -3629,9 +3629,9 @@ bool MipsAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
                                             OperandVector &Operands,
                                             MCStreamer &Out,
                                             uint64_t &ErrorInfo,
-                                            bool MatchingInlineAsm, unsigned int &ErrorCode, uint64_t &Address) {
-
-  MCInst Inst;
+                                            bool MatchingInlineAsm, unsigned int &ErrorCode, uint64_t &Address)
+{
+  MCInst Inst(Address);
   SmallVector<MCInst, 8> Instructions;
   unsigned MatchResult =
       MatchInstructionImpl(Operands, Inst, ErrorInfo, MatchingInlineAsm);
@@ -3642,7 +3642,12 @@ bool MipsAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
       return true;
     for (unsigned i = 0; i < Instructions.size(); i++)
       Out.EmitInstruction(Instructions[i], getSTI(), ErrorCode);
-    return ErrorCode != 0;
+    if (ErrorCode == 0) {
+        Address = Inst.getAddress(); // Keystone update address
+        return false;
+    } else
+        return true;
+
   }
   case Match_MissingFeature:
     Error(IDLoc, "instruction requires a CPU feature not currently enabled");

diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
@@ -213,6 +213,9 @@ encodeInstruction(MCInst &MI, raw_ostream &OS,
     llvm_unreachable("Desc.getSize() returns 0");
 
   EmitInstruction(Binary, Size, STI, OS);
+
+  // Keystone: update Inst.Address to point to the next instruction
+  MI.setAddress(MI.getAddress() + Size);
 }
 
 /// getBranchTargetOpValue - Return binary encoding of the branch
@@ -226,7 +229,7 @@ getBranchTargetOpValue(const MCInst &MI, unsigned OpNo,
   const MCOperand &MO = MI.getOperand(OpNo);
 
   // If the destination is an immediate, divide by 4.
-  if (MO.isImm()) return MO.getImm() >> 2;
+  if (MO.isImm()) return (MO.getImm() - MI.getAddress() - 4) >> 2;
 
   assert(MO.isExpr() &&
          "getBranchTargetOpValue expects only expressions or immediates");