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arm: Fix wrong code generated for mve scatter store with writeback in…
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…trinsics with -O2 (PR97271).

This patch fixes (PR97271) the wrong code-gen for mve scatter store with writeback intrinsics with -O2.

$cat bug.c
void
foo (uint32x4_t * addr, const int offset, int32x4_t value)
{
  vstrwq_scatter_base_wb_s32 (addr, 8, value);
}

$ arm-none-eabi-gcc  bug.c -S -O2 -march=armv8.1-m.main+mve -mfloat-abi=hard -o -
Without this patch:
...
foo:
	vldrw.32	q3, [r0]
	vstrw.u32       q0, [q3, gcc-mirror#8]!  ---> (A)
	vldr.64 d4, .L3
	vldr.64 d5, .L3+8
	vldrw.32	q3, [r0]
	vstrw.u32       q2, [q3, gcc-mirror#8]!  ---> (B)
	bx      lr
...

With this patch:
...
foo:
	vldrw.32	q3, [r0]
	vstrw.u32       q0, [q3, gcc-mirror#8]!  --> (C)
	vstrw.32	q3, [r0]
	bx      lr
...

Without this patch 2 vstrw assembly instructions (A and B) are generated for vstrwq_scatter_base_wb_s32
intrinsic where as fix generates only one vstrw assembly instruction (C).

gcc/ChangeLog:

2020-10-06  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

	PR target/97291
	* config/arm/arm-builtins.c (arm_strsbwbs_qualifiers): Modify array.
	(arm_strsbwbu_qualifiers): Likewise.
	(arm_strsbwbs_p_qualifiers): Likewise.
	(arm_strsbwbu_p_qualifiers): Likewise.
	* config/arm/arm_mve.h (__arm_vstrdq_scatter_base_wb_s64): Modify
	function definition.
	(__arm_vstrdq_scatter_base_wb_u64): Likewise.
	(__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
	(__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
	(__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
	(__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
	(__arm_vstrwq_scatter_base_wb_s32): Likewise.
	(__arm_vstrwq_scatter_base_wb_u32): Likewise.
	(__arm_vstrwq_scatter_base_wb_f32): Likewise.
	(__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
	* config/arm/arm_mve_builtins.def (vstrwq_scatter_base_wb_add_u): Remove
	expansion for the builtin.
	(vstrwq_scatter_base_wb_add_s): Likewise.
	(vstrwq_scatter_base_wb_add_f): Likewise.
	(vstrdq_scatter_base_wb_add_u): Likewise.
	(vstrdq_scatter_base_wb_add_s): Likewise.
	(vstrwq_scatter_base_wb_p_add_u): Likewise.
	(vstrwq_scatter_base_wb_p_add_s): Likewise.
	(vstrwq_scatter_base_wb_p_add_f): Likewise.
	(vstrdq_scatter_base_wb_p_add_u): Likewise.
	(vstrdq_scatter_base_wb_p_add_s): Likewise.
	* config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Remove
	expand.
	(mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
	(mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Rename pattern to ...
	(mve_vstrwq_scatter_base_wb_<supf>v4si): This.
	(mve_vstrwq_scatter_base_wb_p_<supf>v4si): Remove expand.
	(mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
	(mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Rename pattern to ...
	(mve_vstrwq_scatter_base_wb_p_<supf>v4si): This.
	(mve_vstrwq_scatter_base_wb_fv4sf): Remove expand.
	(mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
	(mve_vstrwq_scatter_base_wb_fv4sf_insn): Rename pattern to ...
	(mve_vstrwq_scatter_base_wb_fv4sf): This.
	(mve_vstrwq_scatter_base_wb_p_fv4sf): Remove expand.
	(mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
	(mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Rename pattern to ...
	(mve_vstrwq_scatter_base_wb_p_fv4sf): This.
	(mve_vstrdq_scatter_base_wb_<supf>v2di): Remove expand.
	(mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
	(mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Rename pattern to ...
	(mve_vstrdq_scatter_base_wb_<supf>v2di): This.
	(mve_vstrdq_scatter_base_wb_p_<supf>v2di): Remove expand.
	(mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
	(mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Rename pattern to ...
	(mve_vstrdq_scatter_base_wb_p_<supf>v2di): This.

gcc/testsuite/ChangeLog:

	PR target/97291
	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c: Modify.
	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c:
	Likewise.
	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vstrwq_scatter_base_wb_u32.c: Likewise.
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@sripar01
sripar01 committed Oct 16, 2020
1 parent e27c8cc commit 3775358
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8 changes: 4 additions & 4 deletions gcc/config/arm/arm-builtins.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -811,23 +811,23 @@ arm_ldrgbwbu_z_qualifiers[SIMD_MAX_BUILTIN_ARGS]

static enum arm_type_qualifiers
arm_strsbwbs_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_void, qualifier_unsigned, qualifier_const, qualifier_none};
= { qualifier_unsigned, qualifier_unsigned, qualifier_const, qualifier_none};
#define STRSBWBS_QUALIFIERS (arm_strsbwbs_qualifiers)

static enum arm_type_qualifiers
arm_strsbwbu_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_void, qualifier_unsigned, qualifier_const, qualifier_unsigned};
= { qualifier_unsigned, qualifier_unsigned, qualifier_const, qualifier_unsigned};
#define STRSBWBU_QUALIFIERS (arm_strsbwbu_qualifiers)

static enum arm_type_qualifiers
arm_strsbwbs_p_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_void, qualifier_unsigned, qualifier_const,
= { qualifier_unsigned, qualifier_unsigned, qualifier_const,
qualifier_none, qualifier_unsigned};
#define STRSBWBS_P_QUALIFIERS (arm_strsbwbs_p_qualifiers)

static enum arm_type_qualifiers
arm_strsbwbu_p_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_void, qualifier_unsigned, qualifier_const,
= { qualifier_unsigned, qualifier_unsigned, qualifier_const,
qualifier_unsigned, qualifier_unsigned};
#define STRSBWBU_P_QUALIFIERS (arm_strsbwbu_p_qualifiers)

Expand Down
30 changes: 10 additions & 20 deletions gcc/config/arm/arm_mve.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -13956,64 +13956,56 @@ __extension__ extern __inline void
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vstrdq_scatter_base_wb_s64 (uint64x2_t * __addr, const int __offset, int64x2_t __value)
{
__builtin_mve_vstrdq_scatter_base_wb_sv2di (*__addr, __offset, __value);
__builtin_mve_vstrdq_scatter_base_wb_add_sv2di (*__addr, __offset, *__addr);
*__addr = __builtin_mve_vstrdq_scatter_base_wb_sv2di (*__addr, __offset, __value);
}

__extension__ extern __inline void
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vstrdq_scatter_base_wb_u64 (uint64x2_t * __addr, const int __offset, uint64x2_t __value)
{
__builtin_mve_vstrdq_scatter_base_wb_uv2di (*__addr, __offset, __value);
__builtin_mve_vstrdq_scatter_base_wb_add_uv2di (*__addr, __offset, *__addr);
*__addr = __builtin_mve_vstrdq_scatter_base_wb_uv2di (*__addr, __offset, __value);
}

__extension__ extern __inline void
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vstrdq_scatter_base_wb_p_s64 (uint64x2_t * __addr, const int __offset, int64x2_t __value, mve_pred16_t __p)
{
__builtin_mve_vstrdq_scatter_base_wb_p_sv2di (*__addr, __offset, __value, __p);
__builtin_mve_vstrdq_scatter_base_wb_p_add_sv2di (*__addr, __offset, *__addr, __p);
*__addr = __builtin_mve_vstrdq_scatter_base_wb_p_sv2di (*__addr, __offset, __value, __p);
}

__extension__ extern __inline void
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vstrdq_scatter_base_wb_p_u64 (uint64x2_t * __addr, const int __offset, uint64x2_t __value, mve_pred16_t __p)
{
__builtin_mve_vstrdq_scatter_base_wb_p_uv2di (*__addr, __offset, __value, __p);
__builtin_mve_vstrdq_scatter_base_wb_p_add_uv2di (*__addr, __offset, *__addr, __p);
*__addr = __builtin_mve_vstrdq_scatter_base_wb_p_uv2di (*__addr, __offset, __value, __p);
}

__extension__ extern __inline void
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vstrwq_scatter_base_wb_p_s32 (uint32x4_t * __addr, const int __offset, int32x4_t __value, mve_pred16_t __p)
{
__builtin_mve_vstrwq_scatter_base_wb_p_sv4si (*__addr, __offset, __value, __p);
__builtin_mve_vstrwq_scatter_base_wb_p_add_sv4si (*__addr, __offset, *__addr, __p);
*__addr = __builtin_mve_vstrwq_scatter_base_wb_p_sv4si (*__addr, __offset, __value, __p);
}

__extension__ extern __inline void
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vstrwq_scatter_base_wb_p_u32 (uint32x4_t * __addr, const int __offset, uint32x4_t __value, mve_pred16_t __p)
{
__builtin_mve_vstrwq_scatter_base_wb_p_uv4si (*__addr, __offset, __value, __p);
__builtin_mve_vstrwq_scatter_base_wb_p_add_uv4si (*__addr, __offset, *__addr, __p);
*__addr = __builtin_mve_vstrwq_scatter_base_wb_p_uv4si (*__addr, __offset, __value, __p);
}

__extension__ extern __inline void
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vstrwq_scatter_base_wb_s32 (uint32x4_t * __addr, const int __offset, int32x4_t __value)
{
__builtin_mve_vstrwq_scatter_base_wb_sv4si (*__addr, __offset, __value);
__builtin_mve_vstrwq_scatter_base_wb_add_sv4si (*__addr, __offset, *__addr);
*__addr = __builtin_mve_vstrwq_scatter_base_wb_sv4si (*__addr, __offset, __value);
}

__extension__ extern __inline void
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vstrwq_scatter_base_wb_u32 (uint32x4_t * __addr, const int __offset, uint32x4_t __value)
{
__builtin_mve_vstrwq_scatter_base_wb_uv4si (*__addr, __offset, __value);
__builtin_mve_vstrwq_scatter_base_wb_add_uv4si (*__addr, __offset, *__addr);
*__addr = __builtin_mve_vstrwq_scatter_base_wb_uv4si (*__addr, __offset, __value);
}

__extension__ extern __inline uint8x16_t
Expand Down Expand Up @@ -19128,16 +19120,14 @@ __extension__ extern __inline void
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vstrwq_scatter_base_wb_f32 (uint32x4_t * __addr, const int __offset, float32x4_t __value)
{
__builtin_mve_vstrwq_scatter_base_wb_fv4sf (*__addr, __offset, __value);
__builtin_mve_vstrwq_scatter_base_wb_add_fv4sf (*__addr, __offset, *__addr);
*__addr = __builtin_mve_vstrwq_scatter_base_wb_fv4sf (*__addr, __offset, __value);
}

__extension__ extern __inline void
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vstrwq_scatter_base_wb_p_f32 (uint32x4_t * __addr, const int __offset, float32x4_t __value, mve_pred16_t __p)
{
__builtin_mve_vstrwq_scatter_base_wb_p_fv4sf (*__addr, __offset, __value, __p);
__builtin_mve_vstrwq_scatter_base_wb_p_add_fv4sf (*__addr, __offset, *__addr, __p);
*__addr = __builtin_mve_vstrwq_scatter_base_wb_p_fv4sf (*__addr, __offset, __value, __p);
}

__extension__ extern __inline float16x8_t
Expand Down
10 changes: 0 additions & 10 deletions gcc/config/arm/arm_mve_builtins.def
View file
Original file line number Diff line number Diff line change
Expand Up @@ -826,19 +826,9 @@ VAR3 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE, vidupq_m_n_u, v16qi, v8hi, v4si)
VAR3 (TERNOP_UNONE_UNONE_UNONE_IMM, vdwdupq_n_u, v16qi, v4si, v8hi)
VAR3 (TERNOP_UNONE_UNONE_UNONE_IMM, viwdupq_n_u, v16qi, v4si, v8hi)
VAR1 (STRSBWBU, vstrwq_scatter_base_wb_u, v4si)
VAR1 (STRSBWBU, vstrwq_scatter_base_wb_add_u, v4si)
VAR1 (STRSBWBU, vstrwq_scatter_base_wb_add_s, v4si)
VAR1 (STRSBWBU, vstrwq_scatter_base_wb_add_f, v4sf)
VAR1 (STRSBWBU, vstrdq_scatter_base_wb_u, v2di)
VAR1 (STRSBWBU, vstrdq_scatter_base_wb_add_u, v2di)
VAR1 (STRSBWBU, vstrdq_scatter_base_wb_add_s, v2di)
VAR1 (STRSBWBU_P, vstrwq_scatter_base_wb_p_u, v4si)
VAR1 (STRSBWBU_P, vstrwq_scatter_base_wb_p_add_u, v4si)
VAR1 (STRSBWBU_P, vstrwq_scatter_base_wb_p_add_s, v4si)
VAR1 (STRSBWBU_P, vstrwq_scatter_base_wb_p_add_f, v4sf)
VAR1 (STRSBWBU_P, vstrdq_scatter_base_wb_p_u, v2di)
VAR1 (STRSBWBU_P, vstrdq_scatter_base_wb_p_add_u, v2di)
VAR1 (STRSBWBU_P, vstrdq_scatter_base_wb_p_add_s, v2di)
VAR1 (STRSBWBS, vstrwq_scatter_base_wb_s, v4si)
VAR1 (STRSBWBS, vstrwq_scatter_base_wb_f, v4sf)
VAR1 (STRSBWBS, vstrdq_scatter_base_wb_s, v2di)
Expand Down
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