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cxl/pci: Fix to record only non-zero ranges
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[ Upstream commit 55e2686 ]

The function cxl_dvsec_rr_decode() retrieves and records DVSEC ranges
into info->dvsec_range[], regardless of whether it is non-zero range,
and the variable info->ranges indicates the number of non-zero ranges.
However, in cxl_hdm_decode_init(), the validation for
info->dvsec_range[] occurs in a for loop that iterates based on
info->ranges. It may result in zero range to be validated but non-zero
range not be validated, in turn, the number of allowed ranges is to be
0. Address it by only record non-zero ranges.

This fix is not urgent as it requires a configuration that zeroes out
the first dvsec range while populating the second. This has not been
observed, but it is theoretically possible. If this gets picked up for
-stable, no harm done, but there is no urgency to backport.

Fixes: 560f785 ("cxl/pci: Retrieve CXL DVSEC memory info")
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Yanfei Xu <yanfei.xu@intel.com>
Reviewed-by: Alison Schofield <alison.schofield@intel.com>
Link: https://patch.msgid.link/20240828084231.1378789-2-yanfei.xu@intel.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
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YanfeiXu authored and gregkh committed Oct 4, 2024
1 parent c462e91 commit e21de2b
Showing 1 changed file with 1 addition and 7 deletions.
8 changes: 1 addition & 7 deletions drivers/cxl/core/pci.c
Original file line number Diff line number Diff line change
Expand Up @@ -390,10 +390,6 @@ int cxl_dvsec_rr_decode(struct device *dev, int d,

size |= temp & CXL_DVSEC_MEM_SIZE_LOW_MASK;
if (!size) {
info->dvsec_range[i] = (struct range) {
.start = 0,
.end = CXL_RESOURCE_NONE,
};
continue;
}

Expand All @@ -411,12 +407,10 @@ int cxl_dvsec_rr_decode(struct device *dev, int d,

base |= temp & CXL_DVSEC_MEM_BASE_LOW_MASK;

info->dvsec_range[i] = (struct range) {
info->dvsec_range[ranges++] = (struct range) {
.start = base,
.end = base + size - 1
};

ranges++;
}

info->ranges = ranges;
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