Copyright (C) 2018-2023 LeWiz Communications, Inc. All rights reserved
---------- April 2, 2023
All materials for LMAC_CORE1 are now released under Apache 2.0 license
http://www.apache.org/licenses/LICENSE-2.0
----------- Aug 16, 2022
The 3 part demo videos of LMAC Ethernet core on ZCU102 Xilinx FPGA board can also be found at :
-- Part 1:
https://youtu.be/pwiQhrN6UcA Part 1: Demo using LeWiz LMAC1 (from GitHub) with Petalinux to ping, telnet, and wget functions. The demo has a complete system with LeWiz LMAC1 Ethernet controller, Zynq Arm processor subsystem, Linux OS running on Xilinx ZCU102 board.
-- Part 2
https://youtu.be/JZy0kAAv0gE Part 2: More in depth demo of LeWiz LMAC1 Ethernet controller + Processor subsystem with Petalinux on Xilinx ZCU102 board
-- Part 3
https://youtu.be/hSer9O6Q64o Part 3 of 3 part series. More robust demo using LeWiz LMAC1 (from GitHub) with Ubuntu Linux. The demo has a complete system with LeWiz LMAC1 Ethernet controller, Zynq Arm processor subsystem, Linux OS running on Xilinx ZCU102 board.
----------- Feb 2, 2021
Open source simulation tool such as Verilator has been used by other users
Simulation tool in FPGA tool such as Vivado has also been used by users with this core
---------------- Nov 16, 2020
Added spec for LMAC1 Linux device driver as implemented for the ZCU102 board FPGA design example. The pdf doc is under the ZCU102 folder https://github.com/lewiz-support/LMAC_CORE1/tree/master/ZCU102/
---------------- Oct 15, 2020
Updated code/software release in ZCU102 folder - Xilinx ZCU102 board implementation
README file for this release is also available in the ZCU102 folder
Videos of the testing and demos are also available in ZCU102/video_demos folder
Thank you Edgar Iglesias@Xilinx for contributing to the device driver and independent testing.
----------- Aug 26, 2020
Description of the demo hardware, software, system and functionalities A previous video showed basic usage of LeWiz's LMAC1 Ethernet core using PING, telnet, etc. This demo showed more intense applications and heavy traffic through LMAC1 Core on Xilinx FPGA board.
Hardware implementation
- LeWiz's LMAC1 Ethernet MAC core (source code is available here)
- LeWiz's AXI-Stream bridge
- Integrated with Xilinx's DMA
- implemented on Xiinx's Zynq Ultrascale+ ZCU102 FPGA board
Ran with Base Software
- Ubuntu OS
- LeWiz's LMAC1 device driver (included configuration code for ZCU102 board's external clock)
(All of the above hardware project code, constraints, source code, etc. are available at this Github site.) (released as LMAC_CORE1/ZCU102/)
Applications (used to test the traffic and connections through LMAC1)
- LeWiz's integrated wireless proxy/gateway - 1 side is wireless port, the other side is LMAC1 connecting to the network and Internet (FPGA board acting as a gateway Internet server)
- TCPdump (Wireshark) - Linux app to capture and show traffic through LMAC1 (You'll see LeWiz's Ethernet MAC address displayed)
- remote desktop login - from Windows client on the Ethernet network remote login to the FPGA board via LMAC1
Wireless client (a Windows laptop)
- to establish connection with the FPGA board wirelessly and Web browsing to the Internet via the LMAC1 Ethernet port
--- DEMO FUNCTIONALITY - heavy simulataneous video traffic Showed boot up sequence Showed configuration of the LMAC1 device driver and ZCU102 clocks
Connectivity with wired and wireless clients Browse the Internet and showed simultaneous playing of multiple videos from different sites Capture network traffic through the LMAC1 port Showed different connections established via LMAC1 to different Internet Web sites as expected.
This integrated demo ran very well with heavy traffic for >4 hours until we stopped it. Others also reported tested it overnight. No problem. Testings were conducted on Xilinx FPGA boards - both the ZCU102 E9 (standard) and much larger E15 FPGA devices.
-------- July 09, 2020
FPGA IMPLEMENTATION FOR LMAC_CORE1 on Xilinx ZCU102 FPGA board. Tested Ping Application to different systems on the network.
-------- Mar 09, 2020
FPGA IMPLEMENTATION FOR LMAC_CORE1 (1G ETHERNET 1000BASE-X) on Xilinx VC709 FPGA board.
LeWiz Communications, Inc. Ethernet MAC Core1 - Ethernet 1G/100M/10M
-------- May 16, 2019
Released code files as separate files. No longer 1 zip file. Updated code, test files to latest release.
-------- Nov 21, 2018
This is the open source Ethernet Core 1 Release as GNU LGPL open source - make sure you read the full license file (included as PDF) All information are released as-is. LeWiz assumes absolutely no liability
The release consists of 4 ZIP files: CODE, 2 LMAC_INFO_part* for TESTS, and DOCS There are README files under each zip file. If you follow the instructions, you should be able to use the core and test it as we have done.
The release includes the core, test bench, test files, documentation for understanding the information in the zip files including code, test, core descriptions
The main core itself has been production deployed and used on Intel and Xilinx FPGAs for several years. The interface for AXI is recently added to make it easy for the user to interface.
This release is not intended for synthesis as it does not contain any FPGA or other semiconductor technology specific (memory/FIFO IP, etc.) To synthesize, those parts need to be replaced with specific semiconductor technology equivalent.
Simulation is intended for ModelSim tool.