allow identity mapping at 0

librerpi · Aug 14, 2023 · 78969f3 · 78969f3
1 parent 4c4b960
commit 78969f3
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Showing 7 changed files with 95 additions and 3 deletions.
diff --git a/arch/arm64/arch.c b/arch/arm64/arch.c
@@ -97,7 +97,7 @@ void arch_idle(void) {
     __asm__ volatile("wfi");
 }
 
-void arch_chain_load(void *entry, ulong arg0, ulong arg1, ulong arg2, ulong arg3) {
+__WEAK void arch_chain_load(void *entry, ulong arg0, ulong arg1, ulong arg2, ulong arg3) {
     PANIC_UNIMPLEMENTED;
 }
 

diff --git a/arch/arm64/cache-ops.S b/arch/arm64/cache-ops.S
@@ -92,8 +92,84 @@ FUNCTION(arm64_local_clean_invalidate_cache_all)
     ret
 END_FUNCTION(arm64_local_clean_invalidate_cache_all)
 
+.macro putc c
+  ldr x12, =0xffffffffc0201000
+  mov x13, #\c
+  str x13, [x12]
+.endm
+
 /* void arch_disable_cache(uint flags) */
 FUNCTION(arch_disable_cache)
+  // LK runs in EL1
+
+  /* Disable iCache and dCache */
+.inEL1:
+  mrs x4, sctlr_el1
+  bic x4, x4, #(1 << 12) // Disable iCache
+  bic x4, x4, #(1 << 2)  // Disable dCache
+  msr sctlr_el1, x4
+  isb
+
+  /* Clean and Invalidate dCache */
+  mrs x0, CLIDR_EL1
+  and w3, w0, #0x07000000     // Bits: 26:24 Level of Coherence
+  lsr w3, w3, #23             // Store 2 x LoC in W3
+  cbz w3, Finished            // If 0, we are done
+  mov w10, #0                 // store 2x cache level (since csselr starts at bit 1)
+  mov w8, #1
+
+Loop1:
+  //putc 'a'
+  add w2, w10, w10, lsr #1    // Calculate 3x cache level a(w10 + 2w10 = 3w10)
+  lsr w1, w0, w2              // read cType (cache type)
+  and w1, w1, #0x7            // mask 3-bits
+  cmp w1, #2                  // types >=2 include data cache
+  b.lt Skip                   // skip if no data cache implemented
+
+  msr csselr_el1, x10         // select the cache level
+  isb                         // sync
+  mrs x1, ccsidr_el1          // read ccsidr (current cache size id)
+  and w2, w1, #0x7            // w2 = log2(linesize) - 4
+  add w2, w2, #4              // w2 = log2(linesize)
+  ubfx w4, w1, #3, #10        // w4 = way number (associativity)
+  clz w5, w4                  // w5 = 32 - log2(ways), bit pos in dc operand
+  lsl w9, w4, w5              // w9 = max way number, aligned to position in dc operand
+  lsl w16, w8, w5             // w16 = amount to decrement way number per iteration
+Loop2:
+  //putc 'b'
+  ubfx w7, w1, #13, #15       // w7 = max set number
+  lsl w7, w7, w2              // w7= max set number, aligned to position in dc operand
+  lsl w17, w8, w2             // w17 = amount to decrement set number per iteration
+Loop3:
+  //putc 'c'
+  orr w11, w10, w9            // w11 = combine way number, cache number and set num for dc operand
+  orr w11, w11, w7
+  dc cisw, x11                 // perform clean by set and way
+  subs w7, w7, w17            // decrement set number
+  b.ge Loop3
+  subs x9, x9, x16            // decrement way number
+  b.ge Loop2
+Skip:
+  //putc 'd'
+  add w10, w10, #2
+  cmp w3, w10
+  dsb sy
+  b.gt Loop1
+Finished:
+  //putc 'e'
+  /* invalidate iCache*/
+  ic ialluis
+  isb
+  //putc 'f'
+
+  /* invalidate TLB */
+  tlbi vmalle1
+  dsb sy
+  isb
+  //putc 'g'
+  ret
+FUNCTION(arch_disable_cache_unfinished)
+  putc 'a'
   mov     x7, x0                      // save flags
   mrs     x8, daif                    // save the old interrupt state
   msr daifset, #2                     // interrupts disabled
@@ -133,3 +209,7 @@ FUNCTION(arch_disable_cache)
 invalidate_cache:
   dmb     ishst
   mrs     x0, clidr_el1
+
+  b .
+literals:
+.ltorg
diff --git a/arch/arm64/start.S b/arch/arm64/start.S
@@ -32,6 +32,9 @@ boot_el                 .req x28
 FUNCTION(_start)
 .globl arm_reset
 arm_reset:
+    ldr x0, =19200000
+    msr     cntfrq_el0, x0
+
     /* keep track of the boot EL */
     mrs     boot_el, currentel
 

diff --git a/kernel/include/kernel/vm.h b/kernel/include/kernel/vm.h
@@ -197,6 +197,7 @@ typedef struct vmm_aspace {
 } vmm_aspace_t;
 
 #define VMM_ASPACE_FLAG_KERNEL 0x1
+#define VMM_ASPACE_FLAG_NULLPAGE 0x2
 
 typedef struct vmm_region {
     struct list_node node;

diff --git a/kernel/mutex.c b/kernel/mutex.c
@@ -65,9 +65,12 @@ status_t mutex_acquire_timeout(mutex_t *m, lk_time_t timeout) {
     DEBUG_ASSERT(m->magic == MUTEX_MAGIC);
 
 #if LK_DEBUGLEVEL > 0
-    if (unlikely(get_current_thread() == m->holder))
+    // TODO, should throw an error if getting a mutex in irq
+    if (unlikely(get_current_thread() == m->holder)) {
+        printf("caller %p\n", __GET_CALLER());
         panic("mutex_acquire_timeout: thread %p (%s) tried to acquire mutex %p it already owns.\n",
               get_current_thread(), get_current_thread()->name, m);
+    }
 #endif
 
     THREAD_LOCK(state);

diff --git a/kernel/vm/vmm.c b/kernel/vm/vmm.c
@@ -671,6 +671,9 @@ status_t vmm_create_aspace(vmm_aspace_t **_aspace, const char *name, uint flags)
     if (aspace->flags & VMM_ASPACE_FLAG_KERNEL) {
         aspace->base = KERNEL_ASPACE_BASE;
         aspace->size = KERNEL_ASPACE_SIZE;
+    } else if (aspace->flags & VMM_ASPACE_FLAG_NULLPAGE) {
+        aspace->base = 0;
+        aspace->size = 16 << 20;
     } else {
         aspace->base = USER_ASPACE_BASE;
         aspace->size = USER_ASPACE_SIZE;

diff --git a/lib/gfxconsole/gfxconsole.c b/lib/gfxconsole/gfxconsole.c
@@ -48,7 +48,9 @@ static void gfxconsole_putc(char c) {
 
     switch (state) {
         case NORMAL: {
-            if (c == '\n' || c == '\r') {
+            if (c == '\r') {
+                gfxconsole.x = 0;
+            } else if (c == '\n' || c == '\r') {
                 gfxconsole.x = 0;
                 gfxconsole.y++;
             } else if (c == 0x1b) {