when --debug is used, a halted pin is added to VexRiscv for the user …

…usages
litex-hub · Apr 25, 2024 · 8542a57 · 8542a57
1 parent 03d8c47
commit 8542a57
Showing 1 changed file with 3 additions and 0 deletions.
diff --git a/pythondata_cpu_vexriscv/verilog/src/main/scala/vexriscv/GenCoreDefault.scala b/pythondata_cpu_vexriscv/verilog/src/main/scala/vexriscv/GenCoreDefault.scala
@@ -331,6 +331,9 @@ object GenCoreDefault{
             plugin.dBus.setAsDirectionLess()
             master(plugin.dBus.toWishbone()).setName("dBusWishbone")
           }
+          case plugin : DebugPlugin => {
+            out(CombInit(cpu.reflectBaseType("DebugPlugin_haltIt")).setName("halted"))
+          }
           case _ =>
         }
       }