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Lower neon_vqdmlal, neon_vqdmlsl
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ghehg committed Nov 11, 2024
1 parent 94289aa commit 56e0cd8
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Showing 2 changed files with 240 additions and 196 deletions.
15 changes: 15 additions & 0 deletions clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2365,6 +2365,21 @@ mlir::Value CIRGenFunction::emitCommonNeonBuiltinExpr(
: "aarch64.neon.saddlp",
vTy, getLoc(e->getExprLoc()));
}
case NEON::BI__builtin_neon_vqdmlal_v:
case NEON::BI__builtin_neon_vqdmlsl_v: {
llvm::SmallVector<mlir::Value, 2> mulOps(ops.begin() + 1, ops.end());
cir::VectorType mulSrcTy = builder.getExtendedOrTruncatedElementVectorType(
vTy, false /* truncate */,
mlir::cast<cir::IntType>(vTy.getEltType()).isSigned());
ops[1] = emitNeonCall(builder, {mulSrcTy, mulSrcTy}, mulOps,
"aarch64.neon.sqdmull", vTy, getLoc(e->getExprLoc()));
ops.resize(2);
return emitNeonCall(builder, {vTy, vTy}, ops,
builtinID == NEON::BI__builtin_neon_vqdmlal_v
? "aarch64.neon.sqadd"
: "aarch64.neon.sqsub",
vTy, getLoc(e->getExprLoc()));
}
case NEON::BI__builtin_neon_vext_v:
case NEON::BI__builtin_neon_vextq_v: {
int cv = getIntValueFromConstOp(ops[2]);
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