[CIR][CodeGen] Special treatment of 3-element extended vector load and store #674
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jopperm
reviewed
Jun 10, 2024
| // CIR-NEXT: cir.store %[[#RESULT]], %[[#PVECC]] : !cir.vector<!s32i x 3>, !cir.ptr<!cir.vector<!s32i x 3>> | ||
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| // LLVM-NEXT: %[[#VECB:]] = load <2 x i32>, ptr %[[#PVECB]], align 8 | ||
| // LLVM-NEXT: %[[#VECC:]] = load <3 x i32>, ptr %[[#PVECC]], align 16 |
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This matches clang's codegen, but do we understand why the vector is not loaded as <4 x i32> here?
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Seems a mistake from upstream?
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Not blocking the review, but I agree with @jopperm, since you're going to be looking at OpenCL it might be good to try to understand why for your own knowledge of how vectors should play out in general.
bcardosolopes
approved these changes
Jun 10, 2024
| // CIR-NEXT: cir.store %[[#RESULT]], %[[#PVECC]] : !cir.vector<!s32i x 3>, !cir.ptr<!cir.vector<!s32i x 3>> | ||
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| // LLVM-NEXT: %[[#VECB:]] = load <2 x i32>, ptr %[[#PVECB]], align 8 | ||
| // LLVM-NEXT: %[[#VECC:]] = load <3 x i32>, ptr %[[#PVECC]], align 16 |
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Not blocking the review, but I agree with @jopperm, since you're going to be looking at OpenCL it might be good to try to understand why for your own knowledge of how vectors should play out in general.
This was referenced Jun 13, 2024
bruteforceboy
pushed a commit
to bruteforceboy/clangir
that referenced
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Oct 2, 2024
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Continue the work of #613 .
Original CodeGen treat vec3 as vec4 to get aligned memory access. This PR enable these paths.