[ValueTracking] Infer relationship for the select with SLT

llvm · Aug 6, 2024 · 2bd568f · 2bd568f
1 parent 3023713
commit 2bd568f
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Showing 2 changed files with 11 additions and 8 deletions.
diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
@@ -9119,6 +9119,15 @@ static std::optional<bool> isImpliedCondICmps(const ICmpInst *LHS,
       return false;
   }
 
+  // Take SLT as an example:  L0:x < L1:y and C <= 0
+  //                      ==> R0:(x -nsw y) < R1:(-C) is true
+  if ((LPred == ICmpInst::ICMP_SLT || LPred == ICmpInst::ICMP_SLE) &&
+      match(R0, m_NSWSub(m_Specific(L0), m_Specific(L1)))) {
+    if (match(R1, m_NonNegative()) &&
+        isImpliedCondMatchingOperands(LPred, RPred) == true)
+      return true;
+  }
+
   // L0 = R0 = L1 + R1, L0 >=u L1 implies R0 >=u R1, L0 <u L1 implies R0 <u R1
   if (L0 == R0 &&
       (LPred == ICmpInst::ICMP_ULT || LPred == ICmpInst::ICMP_UGE) &&

diff --git a/llvm/test/Transforms/InstSimplify/select-icmp.ll b/llvm/test/Transforms/InstSimplify/select-icmp.ll
@@ -162,11 +162,8 @@ define i32 @pr54735_slt_neg(i32 %x, i32 %y) {
 ; CHECK-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]]
 ; CHECK:       cond.true:
 ; CHECK-NEXT:    [[SUB:%.*]] = sub nsw i32 [[X]], [[Y]]
-; CHECK-NEXT:    [[ADD:%.*]] = add nsw i32 [[SUB]], -12
 ; CHECK-NEXT:    [[NEG:%.*]] = xor i32 [[SUB]], 12
-; CHECK-NEXT:    [[ABSCOND:%.*]] = icmp sle i32 [[SUB]], 12
-; CHECK-NEXT:    [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[ADD]]
-; CHECK-NEXT:    ret i32 [[ABS]]
+; CHECK-NEXT:    ret i32 [[NEG]]
 ; CHECK:       cond.end:
 ; CHECK-NEXT:    ret i32 0
 ;
@@ -194,11 +191,8 @@ define i32 @pr54735_sle_neg(i32 %x, i32 %y) {
 ; CHECK-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_END:%.*]]
 ; CHECK:       cond.true:
 ; CHECK-NEXT:    [[SUB:%.*]] = sub nsw i32 [[X]], [[Y]]
-; CHECK-NEXT:    [[ADD:%.*]] = add nsw i32 [[SUB]], -12
 ; CHECK-NEXT:    [[NEG:%.*]] = xor i32 [[SUB]], 12
-; CHECK-NEXT:    [[ABSCOND:%.*]] = icmp sle i32 [[SUB]], 12
-; CHECK-NEXT:    [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[ADD]]
-; CHECK-NEXT:    ret i32 [[ABS]]
+; CHECK-NEXT:    ret i32 [[NEG]]
 ; CHECK:       cond.end:
 ; CHECK-NEXT:    ret i32 0
 ;