address pr comments

clang/lib/CodeGen/CGBuiltin.cpp

@@ -17976,17 +17976,15 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned BuiltinID,
     llvm::Type *T0 = Op0->getType();
     llvm::Type *T1 = Op1->getType();
     if (!T0->isVectorTy() && !T1->isVectorTy()) {
-      if (T0->isFloatingPointTy()) {
+      if (T0->isFloatingPointTy())
         return Builder.CreateFMul(Op0, Op1, "dx.dot");
-      }
 
-      if (T0->isIntegerTy()) {
+      if (T0->isIntegerTy())
         return Builder.CreateMul(Op0, Op1, "dx.dot");
-      }
+
       // Bools should have been promoted
-      assert(
-          false &&
-          "Dot product on a scalar is only supported on integers and floats.");
+      llvm_unreachable(
+          "Scalar dot product is only supported on ints and floats.");
     }
     // A VectorSplat should have happened
     assert(T0->isVectorTy() && T1->isVectorTy() &&

clang/test/CodeGenHLSL/builtins/dot.hlsl

@@ -6,7 +6,6 @@
 // RUN:   dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
 // RUN:   -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF
 
-// -fnative-half-type sets __HLSL_ENABLE_16_BIT
 #ifdef __HLSL_ENABLE_16_BIT
 // NATIVE_HALF: %dx.dot = mul i16 %0, %1
 // NATIVE_HALF: ret i16 %dx.dot
@@ -113,19 +112,19 @@ int64_t test_dot_long ( int64_t p0, int64_t p1 ) {
 
 // CHECK: %dx.dot = call i64 @llvm.dx.dot.v2i64(<2 x i64> %0, <2 x i64> %1)
 // CHECK: ret i64 %dx.dot
-int64_t test_dot_uint2 ( int64_t2 p0, int64_t2 p1 ) {
+int64_t test_dot_long2 ( int64_t2 p0, int64_t2 p1 ) {
   return dot ( p0, p1 );
 }
 
 // CHECK: %dx.dot = call i64 @llvm.dx.dot.v3i64(<3 x i64> %0, <3 x i64> %1)
 // CHECK: ret i64 %dx.dot
-int64_t test_dot_uint3 ( int64_t3 p0, int64_t3 p1 ) {
+int64_t test_dot_long3 ( int64_t3 p0, int64_t3 p1 ) {
   return dot ( p0, p1 );
 }
 
 // CHECK: %dx.dot = call i64 @llvm.dx.dot.v4i64(<4 x i64> %0, <4 x i64> %1)
 // CHECK: ret i64 %dx.dot
-int64_t test_dot_uint4 ( int64_t4 p0, int64_t4 p1 ) {
+int64_t test_dot_long4 ( int64_t4 p0, int64_t4 p1 ) {
   return dot ( p0, p1 );
 }
 
@@ -137,19 +136,19 @@ uint64_t test_dot_ulong ( uint64_t p0, uint64_t p1 ) {
 
 // CHECK: %dx.dot = call i64 @llvm.dx.dot.v2i64(<2 x i64> %0, <2 x i64> %1)
 // CHECK: ret i64 %dx.dot
-uint64_t test_dot_uint2 ( uint64_t2 p0, uint64_t2 p1 ) {
+uint64_t test_dot_ulong2 ( uint64_t2 p0, uint64_t2 p1 ) {
   return dot ( p0, p1 );
 }
 
 // CHECK: %dx.dot = call i64 @llvm.dx.dot.v3i64(<3 x i64> %0, <3 x i64> %1)
 // CHECK: ret i64 %dx.dot
-uint64_t test_dot_uint3 ( uint64_t3 p0, uint64_t3 p1 ) {
+uint64_t test_dot_ulong3 ( uint64_t3 p0, uint64_t3 p1 ) {
   return dot ( p0, p1 );
 }
 
 // CHECK: %dx.dot = call i64 @llvm.dx.dot.v4i64(<4 x i64> %0, <4 x i64> %1)
 // CHECK: ret i64 %dx.dot
-uint64_t test_dot_uint4 ( uint64_t4 p0, uint64_t4 p1 ) {
+uint64_t test_dot_ulong4 ( uint64_t4 p0, uint64_t4 p1 ) {
   return dot ( p0, p1 );
 }
 

clang/test/SemaHLSL/BuiltIns/dot-errors.hlsl

@@ -10,7 +10,6 @@ float test_too_many_arg ( float2 p0) {
   // expected-error@-1 {{too many arguments to function call, expected 2, have 3}}
 }
 
-//NOTE: eventually behavior should match builtin
 float test_dot_no_second_arg ( float2 p0) {
   return dot ( p0 );
   // expected-error@-1 {{no matching function for call to 'dot'}}

clang/test/SemaHLSL/OverloadResolutionBugs.hlsl

@@ -24,6 +24,46 @@ void Call4(int16_t H) {
   Fn4(H);
 }
 
+int test_builtin_dot_bool_type_promotion ( bool p0, bool p1 ) {
+  return dot ( p0, p1 );
+}
+
+float test_dot_scalar_mismatch ( float p0, int p1 ) {
+  return dot ( p0, p1 );
+}
+
+float test_dot_element_type_mismatch ( int2 p0, float2 p1 ) {
+  return dot ( p0, p1 );
+}
+
+float test_builtin_dot_vec_int_to_float_promotion ( int2 p0, float2 p1 ) {
+  return dot ( p0, p1 );
+}
+
+int64_t test_builtin_dot_vec_int_to_int64_promotion( int64_t2 p0, int2 p1 ) {
+  return dot ( p0, p1 );
+}
+
+float test_builtin_dot_vec_half_to_float_promotion( float2 p0, half2 p1 ) {
+  return dot( p0, p1 );
+}
+
+float test_builtin_dot_vec_int16_to_float_promotion( float2 p0, int16_t2 p1 ) {
+  return dot( p0, p1 );
+}
+
+half test_builtin_dot_vec_int16_to_half_promotion( half2 p0, int16_t2 p1 ) {
+  return dot( p0, p1 );
+}
+
+int test_builtin_dot_vec_int16_to_int_promotion( int2 p0, int16_t2 p1 ) {
+  return dot( p0, p1 );
+}
+
+int64_t test_builtin_dot_vec_int16_to_int64_promotion( int64_t2 p0, int16_t2 p1 ) {
+  return dot( p0, p1 );
+}
+
 // https://github.com/llvm/llvm-project/issues/81049
 
 // RUN: %clang_cc1 -std=hlsl2021 -finclude-default-header -x hlsl -triple \