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[InstCombine] Fold A >> BW-1 Pred Ext(i1) into A < 0 Pred i1
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-107
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3 files changed

+91
-107
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‎llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp‎

Lines changed: 27 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -5382,35 +5382,6 @@ Instruction *InstCombinerImpl::foldICmpEquality(ICmpInst &I) {
53825382
return new ICmpInst(Pred, A, Builder.CreateTrunc(B, A->getType()));
53835383
}
53845384

5385-
// Test if 2 values have different or same signbits:
5386-
// (X u>> BitWidth - 1) == zext (Y s> -1) --> (X ^ Y) < 0
5387-
// (X u>> BitWidth - 1) != zext (Y s> -1) --> (X ^ Y) > -1
5388-
// (X s>> BitWidth - 1) == sext (Y s> -1) --> (X ^ Y) < 0
5389-
// (X s>> BitWidth - 1) != sext (Y s> -1) --> (X ^ Y) > -1
5390-
Instruction *ExtI;
5391-
if (match(Op1, m_CombineAnd(m_Instruction(ExtI), m_ZExtOrSExt(m_Value(A)))) &&
5392-
(Op0->hasOneUse() || Op1->hasOneUse())) {
5393-
unsigned OpWidth = Op0->getType()->getScalarSizeInBits();
5394-
Instruction *ShiftI;
5395-
Value *X, *Y;
5396-
ICmpInst::Predicate Pred2;
5397-
if (match(Op0, m_CombineAnd(m_Instruction(ShiftI),
5398-
m_Shr(m_Value(X),
5399-
m_SpecificIntAllowUndef(OpWidth - 1)))) &&
5400-
match(A, m_ICmp(Pred2, m_Value(Y), m_AllOnes())) &&
5401-
Pred2 == ICmpInst::ICMP_SGT && X->getType() == Y->getType()) {
5402-
unsigned ExtOpc = ExtI->getOpcode();
5403-
unsigned ShiftOpc = ShiftI->getOpcode();
5404-
if ((ExtOpc == Instruction::ZExt && ShiftOpc == Instruction::LShr) ||
5405-
(ExtOpc == Instruction::SExt && ShiftOpc == Instruction::AShr)) {
5406-
Value *Xor = Builder.CreateXor(X, Y, "xor.signbits");
5407-
Value *R = (Pred == ICmpInst::ICMP_EQ) ? Builder.CreateIsNeg(Xor)
5408-
: Builder.CreateIsNotNeg(Xor);
5409-
return replaceInstUsesWith(I, R);
5410-
}
5411-
}
5412-
}
5413-
54145385
// (A >> C) == (B >> C) --> (A^B) u< (1 << C)
54155386
// For lshr and ashr pairs.
54165387
const APInt *AP1, *AP2;
@@ -7186,6 +7157,33 @@ Instruction *InstCombinerImpl::visitICmpInst(ICmpInst &I) {
71867157
if (Instruction *R = processUMulZExtIdiom(I, Op1, Op0, *this))
71877158
return R;
71887159
}
7160+
7161+
Value *X, *Y;
7162+
// Signbit test folds
7163+
// Fold (X u>> BitWidth - 1 Pred ZExt(i1)) --> X s< 0 Pred i1
7164+
// Fold (X s>> BitWidth - 1 Pred SExt(i1)) --> X s< 0 Pred i1
7165+
Instruction *ExtI;
7166+
if ((I.isUnsigned() || I.isEquality()) &&
7167+
match(Op1,
7168+
m_CombineAnd(m_Instruction(ExtI), m_ZExtOrSExt(m_Value(Y)))) &&
7169+
Y->getType()->getScalarSizeInBits() == 1 &&
7170+
(Op0->hasOneUse() || Op1->hasOneUse())) {
7171+
unsigned OpWidth = Op0->getType()->getScalarSizeInBits();
7172+
Instruction *ShiftI;
7173+
if (match(Op0, m_CombineAnd(m_Instruction(ShiftI),
7174+
m_Shr(m_Value(X), m_SpecificIntAllowUndef(
7175+
OpWidth - 1))))) {
7176+
unsigned ExtOpc = ExtI->getOpcode();
7177+
unsigned ShiftOpc = ShiftI->getOpcode();
7178+
if ((ExtOpc == Instruction::ZExt && ShiftOpc == Instruction::LShr) ||
7179+
(ExtOpc == Instruction::SExt && ShiftOpc == Instruction::AShr)) {
7180+
Value *SLTZero =
7181+
Builder.CreateICmpSLT(X, Constant::getNullValue(X->getType()));
7182+
Value *Cmp = Builder.CreateICmp(Pred, SLTZero, Y, I.getName());
7183+
return replaceInstUsesWith(I, Cmp);
7184+
}
7185+
}
7186+
}
71897187
}
71907188

71917189
if (Instruction *Res = foldICmpEquality(I))

‎llvm/test/Transforms/InstCombine/icmp-shr.ll‎

Lines changed: 52 additions & 55 deletions
Original file line numberDiff line numberDiff line change
@@ -1302,9 +1302,9 @@ define i1 @lshr_neg_sgt_zero(i8 %x) {
13021302

13031303
define i1 @exactly_one_set_signbit(i8 %x, i8 %y) {
13041304
; CHECK-LABEL: @exactly_one_set_signbit(
1305-
; CHECK-NEXT: [[XOR_SIGNBITS:%.*]] = xor i8 [[X:%.*]], [[Y:%.*]]
1306-
; CHECK-NEXT: [[R:%.*]] = icmp slt i8 [[XOR_SIGNBITS]], 0
1307-
; CHECK-NEXT: ret i1 [[R]]
1305+
; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[X:%.*]], [[Y:%.*]]
1306+
; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i8 [[TMP1]], 0
1307+
; CHECK-NEXT: ret i1 [[TMP2]]
13081308
;
13091309
%xsign = lshr i8 %x, 7
13101310
%ypos = icmp sgt i8 %y, -1
@@ -1317,9 +1317,9 @@ define i1 @exactly_one_set_signbit_use1(i8 %x, i8 %y) {
13171317
; CHECK-LABEL: @exactly_one_set_signbit_use1(
13181318
; CHECK-NEXT: [[XSIGN:%.*]] = lshr i8 [[X:%.*]], 7
13191319
; CHECK-NEXT: call void @use(i8 [[XSIGN]])
1320-
; CHECK-NEXT: [[XOR_SIGNBITS:%.*]] = xor i8 [[X]], [[Y:%.*]]
1321-
; CHECK-NEXT: [[R:%.*]] = icmp slt i8 [[XOR_SIGNBITS]], 0
1322-
; CHECK-NEXT: ret i1 [[R]]
1320+
; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[X]], [[Y:%.*]]
1321+
; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i8 [[TMP1]], 0
1322+
; CHECK-NEXT: ret i1 [[TMP2]]
13231323
;
13241324
%xsign = lshr i8 %x, 7
13251325
call void @use(i8 %xsign)
@@ -1331,9 +1331,9 @@ define i1 @exactly_one_set_signbit_use1(i8 %x, i8 %y) {
13311331

13321332
define <2 x i1> @same_signbit(<2 x i8> %x, <2 x i8> %y) {
13331333
; CHECK-LABEL: @same_signbit(
1334-
; CHECK-NEXT: [[XOR_SIGNBITS:%.*]] = xor <2 x i8> [[X:%.*]], [[Y:%.*]]
1335-
; CHECK-NEXT: [[R:%.*]] = icmp sgt <2 x i8> [[XOR_SIGNBITS]], <i8 -1, i8 -1>
1336-
; CHECK-NEXT: ret <2 x i1> [[R]]
1334+
; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i8> [[X:%.*]], [[Y:%.*]]
1335+
; CHECK-NEXT: [[R1:%.*]] = icmp sgt <2 x i8> [[TMP1]], <i8 -1, i8 -1>
1336+
; CHECK-NEXT: ret <2 x i1> [[R1]]
13371337
;
13381338
%xsign = lshr <2 x i8> %x, <i8 7, i8 7>
13391339
%ypos = icmp sgt <2 x i8> %y, <i8 -1, i8 -1>
@@ -1347,9 +1347,9 @@ define i1 @same_signbit_use2(i8 %x, i8 %y) {
13471347
; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt i8 [[Y:%.*]], -1
13481348
; CHECK-NEXT: [[YPOSZ:%.*]] = zext i1 [[YPOS]] to i8
13491349
; CHECK-NEXT: call void @use(i8 [[YPOSZ]])
1350-
; CHECK-NEXT: [[XOR_SIGNBITS:%.*]] = xor i8 [[X:%.*]], [[Y]]
1351-
; CHECK-NEXT: [[R:%.*]] = icmp sgt i8 [[XOR_SIGNBITS]], -1
1352-
; CHECK-NEXT: ret i1 [[R]]
1350+
; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[X:%.*]], [[Y]]
1351+
; CHECK-NEXT: [[R1:%.*]] = icmp sgt i8 [[TMP1]], -1
1352+
; CHECK-NEXT: ret i1 [[R1]]
13531353
;
13541354
%xsign = lshr i8 %x, 7
13551355
%ypos = icmp sgt i8 %y, -1
@@ -1382,9 +1382,10 @@ define i1 @same_signbit_use3(i8 %x, i8 %y) {
13821382

13831383
define <2 x i1> @same_signbit_poison_elts(<2 x i8> %x, <2 x i8> %y) {
13841384
; CHECK-LABEL: @same_signbit_poison_elts(
1385-
; CHECK-NEXT: [[XOR_SIGNBITS:%.*]] = xor <2 x i8> [[X:%.*]], [[Y:%.*]]
1386-
; CHECK-NEXT: [[R:%.*]] = icmp sgt <2 x i8> [[XOR_SIGNBITS]], <i8 -1, i8 -1>
1387-
; CHECK-NEXT: ret <2 x i1> [[R]]
1385+
; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt <2 x i8> [[Y:%.*]], <i8 -1, i8 poison>
1386+
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i8> [[X:%.*]], zeroinitializer
1387+
; CHECK-NEXT: [[R1:%.*]] = xor <2 x i1> [[TMP1]], [[YPOS]]
1388+
; CHECK-NEXT: ret <2 x i1> [[R1]]
13881389
;
13891390
%xsign = lshr <2 x i8> %x, <i8 7, i8 poison>
13901391
%ypos = icmp sgt <2 x i8> %y, <i8 -1, i8 poison>
@@ -1397,11 +1398,10 @@ define <2 x i1> @same_signbit_poison_elts(<2 x i8> %x, <2 x i8> %y) {
13971398

13981399
define i1 @same_signbit_wrong_type(i8 %x, i32 %y) {
13991400
; CHECK-LABEL: @same_signbit_wrong_type(
1400-
; CHECK-NEXT: [[XSIGN:%.*]] = lshr i8 [[X:%.*]], 7
14011401
; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt i32 [[Y:%.*]], -1
1402-
; CHECK-NEXT: [[YPOSZ:%.*]] = zext i1 [[YPOS]] to i8
1403-
; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[XSIGN]], [[YPOSZ]]
1404-
; CHECK-NEXT: ret i1 [[R]]
1402+
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[X:%.*]], 0
1403+
; CHECK-NEXT: [[R1:%.*]] = xor i1 [[TMP1]], [[YPOS]]
1404+
; CHECK-NEXT: ret i1 [[R1]]
14051405
;
14061406
%xsign = lshr i8 %x, 7
14071407
%ypos = icmp sgt i32 %y, -1
@@ -1450,11 +1450,9 @@ define i1 @exactly_one_set_signbit_wrong_shr(i8 %x, i8 %y) {
14501450

14511451
define i1 @exactly_one_set_signbit_wrong_pred(i8 %x, i8 %y) {
14521452
; CHECK-LABEL: @exactly_one_set_signbit_wrong_pred(
1453-
; CHECK-NEXT: [[XSIGN:%.*]] = lshr i8 [[X:%.*]], 7
1454-
; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt i8 [[Y:%.*]], -1
1455-
; CHECK-NEXT: [[YPOSZ:%.*]] = zext i1 [[YPOS]] to i8
1456-
; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[XSIGN]], [[YPOSZ]]
1457-
; CHECK-NEXT: ret i1 [[R]]
1453+
; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[Y:%.*]], [[X:%.*]]
1454+
; CHECK-NEXT: [[R1:%.*]] = icmp slt i8 [[TMP1]], 0
1455+
; CHECK-NEXT: ret i1 [[R1]]
14581456
;
14591457
%xsign = lshr i8 %x, 7
14601458
%ypos = icmp sgt i8 %y, -1
@@ -1465,9 +1463,9 @@ define i1 @exactly_one_set_signbit_wrong_pred(i8 %x, i8 %y) {
14651463

14661464
define i1 @exactly_one_set_signbit_signed(i8 %x, i8 %y) {
14671465
; CHECK-LABEL: @exactly_one_set_signbit_signed(
1468-
; CHECK-NEXT: [[XOR_SIGNBITS:%.*]] = xor i8 [[X:%.*]], [[Y:%.*]]
1469-
; CHECK-NEXT: [[R:%.*]] = icmp slt i8 [[XOR_SIGNBITS]], 0
1470-
; CHECK-NEXT: ret i1 [[R]]
1466+
; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[X:%.*]], [[Y:%.*]]
1467+
; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i8 [[TMP1]], 0
1468+
; CHECK-NEXT: ret i1 [[TMP2]]
14711469
;
14721470
%xsign = ashr i8 %x, 7
14731471
%ypos = icmp sgt i8 %y, -1
@@ -1480,9 +1478,9 @@ define i1 @exactly_one_set_signbit_use1_signed(i8 %x, i8 %y) {
14801478
; CHECK-LABEL: @exactly_one_set_signbit_use1_signed(
14811479
; CHECK-NEXT: [[XSIGN:%.*]] = ashr i8 [[X:%.*]], 7
14821480
; CHECK-NEXT: call void @use(i8 [[XSIGN]])
1483-
; CHECK-NEXT: [[XOR_SIGNBITS:%.*]] = xor i8 [[X]], [[Y:%.*]]
1484-
; CHECK-NEXT: [[R:%.*]] = icmp slt i8 [[XOR_SIGNBITS]], 0
1485-
; CHECK-NEXT: ret i1 [[R]]
1481+
; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[X]], [[Y:%.*]]
1482+
; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i8 [[TMP1]], 0
1483+
; CHECK-NEXT: ret i1 [[TMP2]]
14861484
;
14871485
%xsign = ashr i8 %x, 7
14881486
call void @use(i8 %xsign)
@@ -1494,9 +1492,9 @@ define i1 @exactly_one_set_signbit_use1_signed(i8 %x, i8 %y) {
14941492

14951493
define <2 x i1> @same_signbit_signed(<2 x i8> %x, <2 x i8> %y) {
14961494
; CHECK-LABEL: @same_signbit_signed(
1497-
; CHECK-NEXT: [[XOR_SIGNBITS:%.*]] = xor <2 x i8> [[X:%.*]], [[Y:%.*]]
1498-
; CHECK-NEXT: [[R:%.*]] = icmp sgt <2 x i8> [[XOR_SIGNBITS]], <i8 -1, i8 -1>
1499-
; CHECK-NEXT: ret <2 x i1> [[R]]
1495+
; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i8> [[X:%.*]], [[Y:%.*]]
1496+
; CHECK-NEXT: [[R1:%.*]] = icmp sgt <2 x i8> [[TMP1]], <i8 -1, i8 -1>
1497+
; CHECK-NEXT: ret <2 x i1> [[R1]]
15001498
;
15011499
%xsign = ashr <2 x i8> %x, <i8 7, i8 7>
15021500
%ypos = icmp sgt <2 x i8> %y, <i8 -1, i8 -1>
@@ -1510,9 +1508,9 @@ define i1 @same_signbit_use2_signed(i8 %x, i8 %y) {
15101508
; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt i8 [[Y:%.*]], -1
15111509
; CHECK-NEXT: [[YPOSZ:%.*]] = sext i1 [[YPOS]] to i8
15121510
; CHECK-NEXT: call void @use(i8 [[YPOSZ]])
1513-
; CHECK-NEXT: [[XOR_SIGNBITS:%.*]] = xor i8 [[X:%.*]], [[Y]]
1514-
; CHECK-NEXT: [[R:%.*]] = icmp sgt i8 [[XOR_SIGNBITS]], -1
1515-
; CHECK-NEXT: ret i1 [[R]]
1511+
; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[X:%.*]], [[Y]]
1512+
; CHECK-NEXT: [[R1:%.*]] = icmp sgt i8 [[TMP1]], -1
1513+
; CHECK-NEXT: ret i1 [[R1]]
15161514
;
15171515
%xsign = ashr i8 %x, 7
15181516
%ypos = icmp sgt i8 %y, -1
@@ -1545,9 +1543,10 @@ define i1 @same_signbit_use3_signed(i8 %x, i8 %y) {
15451543

15461544
define <2 x i1> @same_signbit_poison_elts_signed(<2 x i8> %x, <2 x i8> %y) {
15471545
; CHECK-LABEL: @same_signbit_poison_elts_signed(
1548-
; CHECK-NEXT: [[XOR_SIGNBITS:%.*]] = xor <2 x i8> [[X:%.*]], [[Y:%.*]]
1549-
; CHECK-NEXT: [[R:%.*]] = icmp sgt <2 x i8> [[XOR_SIGNBITS]], <i8 -1, i8 -1>
1550-
; CHECK-NEXT: ret <2 x i1> [[R]]
1546+
; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt <2 x i8> [[Y:%.*]], <i8 -1, i8 poison>
1547+
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i8> [[X:%.*]], zeroinitializer
1548+
; CHECK-NEXT: [[R1:%.*]] = xor <2 x i1> [[TMP1]], [[YPOS]]
1549+
; CHECK-NEXT: ret <2 x i1> [[R1]]
15511550
;
15521551
%xsign = ashr <2 x i8> %x, <i8 7, i8 poison>
15531552
%ypos = icmp sgt <2 x i8> %y, <i8 -1, i8 poison>
@@ -1560,11 +1559,10 @@ define <2 x i1> @same_signbit_poison_elts_signed(<2 x i8> %x, <2 x i8> %y) {
15601559

15611560
define i1 @same_signbit_wrong_type_signed(i8 %x, i32 %y) {
15621561
; CHECK-LABEL: @same_signbit_wrong_type_signed(
1563-
; CHECK-NEXT: [[XSIGN:%.*]] = ashr i8 [[X:%.*]], 7
15641562
; CHECK-NEXT: [[YPOS:%.*]] = icmp sgt i32 [[Y:%.*]], -1
1565-
; CHECK-NEXT: [[YPOSZ:%.*]] = sext i1 [[YPOS]] to i8
1566-
; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[XSIGN]], [[YPOSZ]]
1567-
; CHECK-NEXT: ret i1 [[R]]
1563+
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[X:%.*]], 0
1564+
; CHECK-NEXT: [[R1:%.*]] = xor i1 [[TMP1]], [[YPOS]]
1565+
; CHECK-NEXT: ret i1 [[R1]]
15681566
;
15691567
%xsign = ashr i8 %x, 7
15701568
%ypos = icmp sgt i32 %y, -1
@@ -1592,10 +1590,10 @@ define i1 @exactly_one_set_signbit_wrong_shamt_signed(i8 %x, i8 %y) {
15921590

15931591
define i1 @slt_zero_ult_i1(i32 %a, i1 %b) {
15941592
; CHECK-LABEL: @slt_zero_ult_i1(
1595-
; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[B:%.*]] to i32
1596-
; CHECK-NEXT: [[CMP1:%.*]] = lshr i32 [[A:%.*]], 31
1597-
; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i32 [[CMP1]], [[CONV]]
1598-
; CHECK-NEXT: ret i1 [[CMP2]]
1593+
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[A:%.*]], 0
1594+
; CHECK-NEXT: [[TMP2:%.*]] = xor i1 [[B:%.*]], true
1595+
; CHECK-NEXT: [[CMP21:%.*]] = and i1 [[TMP1]], [[TMP2]]
1596+
; CHECK-NEXT: ret i1 [[CMP21]]
15991597
;
16001598
%conv = zext i1 %b to i32
16011599
%cmp1 = lshr i32 %a, 31
@@ -1631,10 +1629,10 @@ define i1 @slt_zero_ult_i1_fail2(i32 %a, i1 %b) {
16311629

16321630
define i1 @slt_zero_slt_i1_fail(i32 %a, i1 %b) {
16331631
; CHECK-LABEL: @slt_zero_slt_i1_fail(
1634-
; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[B:%.*]] to i32
1635-
; CHECK-NEXT: [[CMP1:%.*]] = lshr i32 [[A:%.*]], 31
1636-
; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i32 [[CMP1]], [[CONV]]
1637-
; CHECK-NEXT: ret i1 [[CMP2]]
1632+
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[A:%.*]], 0
1633+
; CHECK-NEXT: [[TMP2:%.*]] = xor i1 [[B:%.*]], true
1634+
; CHECK-NEXT: [[CMP21:%.*]] = and i1 [[TMP1]], [[TMP2]]
1635+
; CHECK-NEXT: ret i1 [[CMP21]]
16381636
;
16391637
%conv = zext i1 %b to i32
16401638
%cmp1 = lshr i32 %a, 31
@@ -1644,10 +1642,9 @@ define i1 @slt_zero_slt_i1_fail(i32 %a, i1 %b) {
16441642

16451643
define i1 @slt_zero_eq_i1_signed(i32 %a, i1 %b) {
16461644
; CHECK-LABEL: @slt_zero_eq_i1_signed(
1647-
; CHECK-NEXT: [[CONV:%.*]] = sext i1 [[B:%.*]] to i32
1648-
; CHECK-NEXT: [[CMP1:%.*]] = ashr i32 [[A:%.*]], 31
1649-
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[CMP1]], [[CONV]]
1650-
; CHECK-NEXT: ret i1 [[CMP2]]
1645+
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[A:%.*]], -1
1646+
; CHECK-NEXT: [[CMP21:%.*]] = xor i1 [[TMP1]], [[B:%.*]]
1647+
; CHECK-NEXT: ret i1 [[CMP21]]
16511648
;
16521649
%conv = sext i1 %b to i32
16531650
%cmp1 = ashr i32 %a, 31

‎llvm/test/Transforms/InstCombine/icmp-xor-signbit.ll‎

Lines changed: 12 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -219,10 +219,9 @@ define <2 x i1> @negative_simplify_splat(<4 x i8> %x) {
219219

220220
define i1 @slt_zero_eq_i1(i32 %a, i1 %b) {
221221
; CHECK-LABEL: @slt_zero_eq_i1(
222-
; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[B:%.*]] to i32
223-
; CHECK-NEXT: [[CMP1:%.*]] = lshr i32 [[A:%.*]], 31
224-
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[CMP1]], [[CONV]]
225-
; CHECK-NEXT: ret i1 [[CMP2]]
222+
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[A:%.*]], -1
223+
; CHECK-NEXT: [[CMP21:%.*]] = xor i1 [[TMP1]], [[B:%.*]]
224+
; CHECK-NEXT: ret i1 [[CMP21]]
226225
;
227226
%conv = zext i1 %b to i32
228227
%cmp1 = lshr i32 %a, 31
@@ -245,11 +244,8 @@ define i1 @slt_zero_eq_i1_fail(i32 %a, i1 %b) {
245244

246245
define i1 @slt_zero_eq_ne_0(i32 %a) {
247246
; CHECK-LABEL: @slt_zero_eq_ne_0(
248-
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[A:%.*]], 0
249-
; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
250-
; CHECK-NEXT: [[CMP1:%.*]] = lshr i32 [[A]], 31
251-
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[CMP1]], [[CONV]]
252-
; CHECK-NEXT: ret i1 [[CMP2]]
247+
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[A:%.*]], 1
248+
; CHECK-NEXT: ret i1 [[TMP1]]
253249
;
254250
%cmp = icmp ne i32 %a, 0
255251
%conv = zext i1 %cmp to i32
@@ -260,11 +256,8 @@ define i1 @slt_zero_eq_ne_0(i32 %a) {
260256

261257
define i1 @slt_zero_ne_ne_0(i32 %a) {
262258
; CHECK-LABEL: @slt_zero_ne_ne_0(
263-
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[A:%.*]], 0
264-
; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
265-
; CHECK-NEXT: [[CMP1:%.*]] = lshr i32 [[A]], 31
266-
; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i32 [[CMP1]], [[CONV]]
267-
; CHECK-NEXT: ret i1 [[CMP2]]
259+
; CHECK-NEXT: [[CMP21:%.*]] = icmp sgt i32 [[A:%.*]], 0
260+
; CHECK-NEXT: ret i1 [[CMP21]]
268261
;
269262
%cmp = icmp ne i32 %a, 0
270263
%conv = zext i1 %cmp to i32
@@ -275,11 +268,8 @@ define i1 @slt_zero_ne_ne_0(i32 %a) {
275268

276269
define <4 x i1> @slt_zero_eq_ne_0_vec(<4 x i32> %a) {
277270
; CHECK-LABEL: @slt_zero_eq_ne_0_vec(
278-
; CHECK-NEXT: [[CMP:%.*]] = icmp ne <4 x i32> [[A:%.*]], zeroinitializer
279-
; CHECK-NEXT: [[CONV:%.*]] = zext <4 x i1> [[CMP]] to <4 x i32>
280-
; CHECK-NEXT: [[CMP1:%.*]] = lshr <4 x i32> [[A]], <i32 31, i32 31, i32 31, i32 31>
281-
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq <4 x i32> [[CMP1]], [[CONV]]
282-
; CHECK-NEXT: ret <4 x i1> [[CMP2]]
271+
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <4 x i32> [[A:%.*]], <i32 1, i32 1, i32 1, i32 1>
272+
; CHECK-NEXT: ret <4 x i1> [[TMP1]]
283273
;
284274
%cmp = icmp ne <4 x i32> %a, zeroinitializer
285275
%conv = zext <4 x i1> %cmp to <4 x i32>
@@ -291,10 +281,9 @@ define <4 x i1> @slt_zero_eq_ne_0_vec(<4 x i32> %a) {
291281
define i1 @slt_zero_ne_ne_b(i32 %a, i32 %b) {
292282
; CHECK-LABEL: @slt_zero_ne_ne_b(
293283
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[A:%.*]], [[B:%.*]]
294-
; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
295-
; CHECK-NEXT: [[CMP1:%.*]] = lshr i32 [[A]], 31
296-
; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i32 [[CMP1]], [[CONV]]
297-
; CHECK-NEXT: ret i1 [[CMP2]]
284+
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[A]], 0
285+
; CHECK-NEXT: [[CMP21:%.*]] = xor i1 [[TMP1]], [[CMP]]
286+
; CHECK-NEXT: ret i1 [[CMP21]]
298287
;
299288
%cmp = icmp ne i32 %a, %b
300289
%conv = zext i1 %cmp to i32

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