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[PowerPC] Fix wrong codegen when stack pointer has to realign in prol…
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…ogue

Current powerpc backend generates wrong code sequence if stack pointer
has to realign if -fstack-clash-protection enabled. When probing in
prologue, backend should generate a subtraction instruction rather
than a `stux` instruction to realign the stack pointer.

This patch is part of fix of
https://bugs.llvm.org/show_bug.cgi?id=46759.

Differential Revision: https://reviews.llvm.org/D84218
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Kai Luo committed Jul 22, 2020
1 parent e9f5ca0 commit 8912252
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Showing 2 changed files with 4 additions and 5 deletions.
7 changes: 3 additions & 4 deletions llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1466,11 +1466,10 @@ void PPCFrameLowering::inlineStackProbe(MachineFunction &MF,
.addImm(0)
.addImm(32 - Log2(MaxAlign))
.addImm(31);
BuildMI(PrologMBB, {MI}, DL, TII.get(isPPC64 ? PPC::STDUX : PPC::STWUX),
BuildMI(PrologMBB, {MI}, DL, TII.get(isPPC64 ? PPC::SUBFC8 : PPC::SUBFC),
SPReg)
.addReg(FPReg)
.addReg(SPReg)
.addReg(ScratchReg);
.addReg(ScratchReg)
.addReg(SPReg);
}
// Probe residual part.
if (NegResidualSize) {
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2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/pr46759.ll
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@ define void @foo(i32 %vla_size) #0 {
; CHECK-LE-NEXT: mr r12, r1
; CHECK-LE-NEXT: .cfi_def_cfa r12, 0
; CHECK-LE-NEXT: clrldi r0, r12, 53
; CHECK-LE-NEXT: stdux r12, r1, r0
; CHECK-LE-NEXT: subc r1, r1, r0
; CHECK-LE-NEXT: stdu r12, -2048(r1)
; CHECK-LE-NEXT: stdu r12, -4096(r1)
; CHECK-LE-NEXT: .cfi_def_cfa_register r1
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