[TargetParser] Generate the defs for RISCV CPUs using llvm-tblgen.

Rework the change to prevent build failures. NFCI.

The failing code was submitted as
cf7a830 and reverted via
8bd65e5.

The rework in this new commit prevents failures like the following:

FAILED: tools/clang/lib/Basic/CMakeFiles/obj.clangBasic.dir/Targets/RISCV.cpp.o
/usr/bin/c++  [bunch of non interesting stuff]  -c <path-to>/llvm-project/clang/lib/Basic/Targets/RISCV.cpp
In file included from <path-to>/llvm-project/clang/lib/Basic/Targets/RISCV.cpp:19:
<path-to>/llvm-project/llvm/include/llvm/TargetParser/RISCVTargetParser.h:29:10: fatal error: llvm/TargetParser/RISCVTargetParserDef.inc: No such file or directory
  29 | #include "llvm/TargetParser/RISCVTargetParserDef.inc"
     |          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

These failures happen because the library LLVMTargetParser depends on
RISCVTargetParserTableGen, which is a tablegen target that generates
the list of CPUs in
llvm/TargetParser/RISCVTargetParserDef.inc. This *.inc file is
included by the public header file
llvm/TargetParser/RISCVTargetParser.h.

The header file llvm/TargetParser/RISCVTargetParser.h is also used in
components (clangDriver and clangBasic) that link into
LLVMTargetParser, but on some configurations such components might end
up being built before TargetParser is ready.

The fix is to make sure that clangDriver and clangBasic depend on the
tablegen target RISCVTargetParserTableGen, which generates the .inc
file whether or not LLVMTargetParser is ready.

WRT the original patch at https://reviews.llvm.org/D137517, this
commit is just adding RISCVTargetParserTableGen in the DEPENDS list of
clangDriver and clangBasic.

clang/lib/Basic/CMakeLists.txt

@@ -110,6 +110,7 @@ add_clang_library(clangBasic
 
   DEPENDS
   omp_gen
+  RISCVTargetParserTableGen
   )
 
 target_link_libraries(clangBasic

clang/lib/Basic/Targets/RISCV.cpp

@@ -15,8 +15,8 @@
 #include "clang/Basic/MacroBuilder.h"
 #include "clang/Basic/TargetBuiltins.h"
 #include "llvm/ADT/StringSwitch.h"
-#include "llvm/Support/TargetParser.h"
 #include "llvm/Support/raw_ostream.h"
+#include "llvm/TargetParser/RISCVTargetParser.h"
 #include <optional>
 
 using namespace clang;

clang/lib/Driver/CMakeLists.txt

@@ -93,6 +93,7 @@ add_clang_library(clangDriver
 
   DEPENDS
   ClangDriverOptions
+  RISCVTargetParserTableGen
 
   LINK_LIBS
   clangBasic

clang/lib/Driver/ToolChains/Arch/RISCV.cpp

@@ -17,8 +17,8 @@
 #include "llvm/Support/Error.h"
 #include "llvm/Support/Host.h"
 #include "llvm/Support/RISCVISAInfo.h"
-#include "llvm/Support/TargetParser.h"
 #include "llvm/Support/raw_ostream.h"
+#include "llvm/TargetParser/RISCVTargetParser.h"
 
 using namespace clang::driver;
 using namespace clang::driver::tools;

llvm/include/llvm/CMakeLists.txt

@@ -1,6 +1,7 @@
 add_subdirectory(IR)
 add_subdirectory(Support)
 add_subdirectory(Frontend)
+add_subdirectory(TargetParser)
 
 # If we're doing an out-of-tree build, copy a module map for generated
 # header files into the build area.

llvm/include/llvm/TargetParser/CMakeLists.txt

@@ -0,0 +1,4 @@
+set(LLVM_TARGET_DEFINITIONS ${CMAKE_SOURCE_DIR}/lib/Target/RISCV/RISCV.td)
+tablegen(LLVM RISCVTargetParserDef.inc -gen-riscv-target-def -I ${CMAKE_SOURCE_DIR}/lib/Target/RISCV/)
+add_public_tablegen_target(RISCVTargetParserTableGen)
+

llvm/include/llvm/TargetParser/RISCVTargetParser.h

@@ -0,0 +1,50 @@
+//===-- RISCVTargetParser - Parser for target features ----------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements a target parser to recognise hardware features
+// FOR RISC-V CPUS.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_TARGETPARSER_RISCVTARGETPARSER_H
+#define LLVM_TARGETPARSER_RISCVTARGETPARSER_H
+
+#include "llvm/ADT/StringRef.h"
+#include <vector>
+
+namespace llvm {
+namespace RISCV {
+
+// We use 64 bits as the known part in the scalable vector types.
+static constexpr unsigned RVVBitsPerBlock = 64;
+
+enum CPUKind : unsigned {
+#define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH) CK_##ENUM,
+#define TUNE_PROC(ENUM, NAME) CK_##ENUM,
+#include "llvm/TargetParser/RISCVTargetParserDef.inc"
+};
+
+enum FeatureKind : unsigned {
+  FK_INVALID = 0,
+  FK_NONE = 1,
+  FK_64BIT = 1 << 2,
+};
+
+bool checkCPUKind(CPUKind Kind, bool IsRV64);
+bool checkTuneCPUKind(CPUKind Kind, bool IsRV64);
+CPUKind parseCPUKind(StringRef CPU);
+CPUKind parseTuneCPUKind(StringRef CPU, bool IsRV64);
+StringRef getMArchFromMcpu(StringRef CPU);
+void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64);
+void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64);
+bool getCPUFeaturesExceptStdExt(CPUKind Kind, std::vector<StringRef> &Features);
+
+} // namespace RISCV
+} // namespace llvm
+
+#endif

llvm/include/llvm/TargetParser/TargetParser.h

@@ -154,34 +154,6 @@ void fillValidArchListR600(SmallVectorImpl<StringRef> &Values);
 IsaVersion getIsaVersion(StringRef GPU);
 
 } // namespace AMDGPU
-
-namespace RISCV {
-
-// We use 64 bits as the known part in the scalable vector types.
-static constexpr unsigned RVVBitsPerBlock = 64;
-
-enum CPUKind : unsigned {
-#define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH) CK_##ENUM,
-#define TUNE_PROC(ENUM, NAME) CK_##ENUM,
-#include "RISCVTargetParser.def"
-};
-
-enum FeatureKind : unsigned {
-  FK_INVALID = 0,
-  FK_NONE = 1,
-  FK_64BIT = 1 << 2,
-};
-
-bool checkCPUKind(CPUKind Kind, bool IsRV64);
-bool checkTuneCPUKind(CPUKind Kind, bool IsRV64);
-CPUKind parseCPUKind(StringRef CPU);
-CPUKind parseTuneCPUKind(StringRef CPU, bool IsRV64);
-StringRef getMArchFromMcpu(StringRef CPU);
-void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64);
-void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64);
-bool getCPUFeaturesExceptStdExt(CPUKind Kind, std::vector<StringRef> &Features);
-
-} // namespace RISCV
 } // namespace llvm
 
 #endif

llvm/include/llvm/module.extern.modulemap

@@ -3,3 +3,4 @@ module LLVM_Extern_IR_Attributes_Gen {}
 module LLVM_Extern_IR_Intrinsics_Gen {}
 module LLVM_Extern_IR_Intrinsics_Enum {}
 module LLVM_Extern_Utils_DataTypes {}
+module LLVM_Extern_TargetParser_Gen {}

llvm/include/llvm/module.install.modulemap

@@ -25,3 +25,7 @@ module LLVM_Extern_Utils_DataTypes {
   header "Support/DataTypes.h"
   export *
 }
+
+module LLVM_Extern_TargetParser_Gen {
+  textual header "TargetParser/RISCVTargetParserDef.inc"
+}

llvm/include/llvm/module.modulemap

@@ -391,6 +391,16 @@ module LLVM_Transforms {
 
 extern module LLVM_Extern_Utils_DataTypes "module.extern.modulemap"
 
+// Build the module with the tablegen-generated files needed by the
+// TargetParser module before building the TargetParser module itself.
+module TargetParserGen {
+  module RISCVTargetParserDef {
+    header "TargetParser/RISCVTargetParser.h"
+    extern module LLVM_Extern_TargetParser_Gen "module.extern.modulemap"
+    export *
+  }
+}
+
 // A module covering ADT/ and Support/. These are intertwined and
 // codependent, and notionally form a single module.
 module LLVM_Utils {
@@ -427,7 +437,6 @@ module LLVM_Utils {
     textual header "TargetParser/AArch64TargetParser.def"
     textual header "TargetParser/ARMTargetParser.def"
     textual header "TargetParser/CSKYTargetParser.def"
-    textual header "TargetParser/RISCVTargetParser.def"
     textual header "TargetParser/X86TargetParser.def"
     textual header "TargetParser/LoongArchTargetParser.def"
   }