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define <16 x i8> @vec_addc_u128_manual(<16 x i8> %a, <16 x i8> %b) unnamed_addr {
start:
%0 = bitcast <16 x i8> %atoi128%1 = bitcast <16 x i8> %btoi128%2 = tailcall { i128, i1 } @llvm.uadd.with.overflow.i128(i128%0, i128%1)
%_7.1 = extractvalue { i128, i1 } %2, 1%_5 = zexti1%_7.1toi128%3 = bitcasti128%_5to <16 x i8>
ret <16 x i8> %3
}
so here the @llvm.uadd.with.overflow.i128 is explicitly there. That won't work for the signed overflowing subtraction, which is too clever and just performs a compare.
The text was updated successfully, but these errors were encountered:
Generate code using the VECTOR ADD COMPUTE CARRY and
VECTOR SUBTRACT COMPUTE BORROW INDICATION instructions
to implement open-coded IR with those semantics.
Handles integer vector types as well as i128.
Fixes: llvm/llvm-project#129608
https://godbolt.org/z/EjoWhj8MM
I expect these to optimize to the same output, but they do not:
The equivalent with
vec_addc_u128
does get optimized into just avaccq
instruction. For the subtraction here we get this:which is unfortunate.
in the addition case, we see
so here the
@llvm.uadd.with.overflow.i128
is explicitly there. That won't work for the signed overflowing subtraction, which is too clever and just performs a compare.The text was updated successfully, but these errors were encountered: