[Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add MMX/SSE/AVX PHADD/SUB & HADDPS/D intrinsics to be used in constexpr

[RKSimon]

The HADD/SUB horizontal intrinsics can all be used in constexpr with suitable handling of the __builtin_ia32_phadd/sub* builtins inside VectorExprEvaluator::VisitCallExpr and InterBuiltin.cpp

_mm_hadd_pi16 _mm_hadd_epi16 _mm256_hadd_epi16 
_mm_hadd_pi32 _mm_hadd_epi32 _mm256_hadd_epi32
_mm_hadds_pi16 _mm_hadds_epi16 _mm256_hadds_epi16 

_mm_hsub_pi16 _mm_hsub_epi16 _mm256_hsub_epi16 
_mm_hsub_pi32 _mm_hsub_epi32 _mm256_hsub_epi32
_mm_hsubs_pi16 _mm_hsubs_epi16 _mm256_hsubs_epi16 

_mm_hadd_pd _mm256_hadd_pd
_mm_hadd_ps _mm256_hadd_ps
_mm_hsub_pd _mm256_hsub_pd
_mm_hsub_ps _mm256_hsub_ps 

These are elementwise horizontal pairwise so getting the correct src/dst element indices is vital and use a mixture of regular add/sub, fadd/fsub and signed sat add/sub arithmetic

[llvmbot]

Hi!

This issue may be a good introductory issue for people new to working on LLVM. If you would like to work on this issue, your first steps are:

1. Check that no other contributor is working on this issue. If someone is assigned to the issue or claimed to be working on it, ping the person. After one week without a response, the assignee may be changed.
2. Leave a comment indicating that you are working on the issue, or just create a pull request after following the steps below. Mention this issue in the description of the pull request.
3. Fix the issue locally.
4. Run the test suite locally. Remember that the subdirectories under test/ create fine-grained testing targets, so you can e.g. use make check-clang-ast to only run Clang's AST tests.
5. Create a Git commit.
6. Run git clang-format HEAD~1 to format your changes.
7. Open a pull request to the upstream repository on GitHub. Detailed instructions can be found in GitHub's documentation. Mention this issue in the description of the pull request.

If you have any further questions about this issue, don't hesitate to ask via a comment in the thread below.

[llvmbot]

@llvm/issue-subscribers-good-first-issue

Author: Simon Pilgrim (RKSimon)

Details

The HADD/SUB horizontal intrinsics can all be used in constexpr with suitable handling of the __builtin_ia32_phadd/sub* builtins inside VectorExprEvaluator::VisitCallExpr ``` _mm_hadd_pi16 _mm_hadd_epi16 _mm256_hadd_epi16 _mm_hadd_pi32 _mm_hadd_epi32 _mm256_hadd_epi32 _mm_hadds_pi16 _mm_hadds_epi16 _mm256_hadds_epi16

_mm_hsub_pi16 _mm_hsub_epi16 _mm256_hsub_epi16
_mm_hsub_pi32 _mm_hsub_epi32 _mm256_hsub_epi32
_mm_hsubs_pi16 _mm_hsubs_epi16 _mm256_hsubs_epi16

_mm_hadd_pd _mm256_hadd_pd
_mm_hadd_ps _mm256_hadd_ps
_mm_hsub_pd _mm256_hsub_pd
_mm_hsub_ps _mm256_hsub_ps

These are elementwise horizontal pairwise so getting the correct src/dst element indices is vital and use a mixture of regular add/sub, fadd/fsub and signed sat add/sub arithmetic
</details>

[llvmbot]

@llvm/issue-subscribers-backend-x86

Author: Simon Pilgrim (RKSimon)

Details

The HADD/SUB horizontal intrinsics can all be used in constexpr with suitable handling of the __builtin_ia32_phadd/sub* builtins inside VectorExprEvaluator::VisitCallExpr ``` _mm_hadd_pi16 _mm_hadd_epi16 _mm256_hadd_epi16 _mm_hadd_pi32 _mm_hadd_epi32 _mm256_hadd_epi32 _mm_hadds_pi16 _mm_hadds_epi16 _mm256_hadds_epi16

_mm_hsub_pi16 _mm_hsub_epi16 _mm256_hsub_epi16
_mm_hsub_pi32 _mm_hsub_epi32 _mm256_hsub_epi32
_mm_hsubs_pi16 _mm_hsubs_epi16 _mm256_hsubs_epi16

_mm_hadd_pd _mm256_hadd_pd
_mm_hadd_ps _mm256_hadd_ps
_mm_hsub_pd _mm256_hsub_pd
_mm_hsub_ps _mm256_hsub_ps

These are elementwise horizontal pairwise so getting the correct src/dst element indices is vital and use a mixture of regular add/sub, fadd/fsub and signed sat add/sub arithmetic
</details>

[llvmbot]

@llvm/issue-subscribers-clang-frontend

Author: Simon Pilgrim (RKSimon)

Details

The HADD/SUB horizontal intrinsics can all be used in constexpr with suitable handling of the __builtin_ia32_phadd/sub* builtins inside VectorExprEvaluator::VisitCallExpr ``` _mm_hadd_pi16 _mm_hadd_epi16 _mm256_hadd_epi16 _mm_hadd_pi32 _mm_hadd_epi32 _mm256_hadd_epi32 _mm_hadds_pi16 _mm_hadds_epi16 _mm256_hadds_epi16

_mm_hsub_pi16 _mm_hsub_epi16 _mm256_hsub_epi16
_mm_hsub_pi32 _mm_hsub_epi32 _mm256_hsub_epi32
_mm_hsubs_pi16 _mm_hsubs_epi16 _mm256_hsubs_epi16

_mm_hadd_pd _mm256_hadd_pd
_mm_hadd_ps _mm256_hadd_ps
_mm_hsub_pd _mm256_hsub_pd
_mm_hsub_ps _mm256_hsub_ps

These are elementwise horizontal pairwise so getting the correct src/dst element indices is vital and use a mixture of regular add/sub, fadd/fsub and signed sat add/sub arithmetic
</details>

[whytolearn]

Hi, I'd like to work on this issue.