[AVR] Optimize 16-bit comparisions with zero

[dylanmckay]

Bugzilla Link	31575
Version	trunk
OS	All

Extended Description

Currently when we try and perform a 16-bit comparision with zero, we generate the following code:

ldi r24, 0
ldi r25, 0
cp r26, r24
cpc r27, r25
breq LBB0_4

We can simplify this to

ldi r24, 0
cp r26, r24
cpc r27, r24

And save a register

[dylanmckay]

That last snippet is missing a 'breq LBB0_4' at the bottom.

[llvmbot]

I have a few further suggestions:

1. Instead of ldi, I think that we should use clr, so that any register can be initialized to zero. ldi is only allowed for registers r16 to r31.

2. This can be generalized to other comparisons. For example, when comparing a 32-bit value to 0x11221122, we will only need to load two 8-bit immediate values 0x11 and 0x22. Or when comparing a 16-bit value to 0xffff or a 32-bit value to 0xffffffff, we only need one immediate value 0xff.

3. For the least significant byte, cpi can be used if the register is between r16 and r31 (see item 1) and if that byte value is only needed for the LSB (see item 2).

4. Equality comparisons == and != (as opposed to < > <= >=) could use cpse/rjmp instead of cpi/cp/cpc followed by a branch. This could allow simple interrupt handlers to avoid saving and restoring SREG.

[llvmbot]

Proposed patch
Hi,
Please find attached a patch which optimizes the 16-bit compare instruction.

Original generated code:
ldi r24, 0
ldi r25, 0
cp r18, r24
cpc r19, r25
breq LBB0_2

Updated Code:
cpi r24, 0
sbci r25, 0
breq LBB0_2

The patch uses an immediate compare using 'cpi' followed by a 'sbci' which takes into account the
generated carry.
We save 2 registers and 2 instructions in this case for any 16-bit compare.

Kindly review this patch and let me know if I have missed anything.
I have added a testcase for this fix,
test/CodeGen/AVR/#31575 .ll

Regression tested for targets which I built (avr, x86 and arm) on SVR revision 343839.
Testing Time: 295.82s
Expected Passes : 18919
Expected Failures : 61
Unsupported Tests : 9003
[100%] Built target check-llvm

I did observe a failure in todays build in testcase : CodeGen/AVR/call.ll
in revision 344047, however this seems unrelated to the patch as it fails with/without the patch.
I will file separate bug report for this.

Regards,
Kaushik

[dylanmckay]

Great work Kaushik, thanks!

I will get onto reviewing the patch

[benshi001]

An alternative way is

cp  rlo, zero_reg
cpc rhi, zero_reg

The zero_reg is R17 on avrtiny or R1 on others.

[benshi001]

fixed by https://reviews.llvm.org/D142281

[benshi001]

fixed by f37d7c9