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Spurious errors emitted for global-scope asm with ThinLTO #61991

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Amanieu opened this issue Apr 6, 2023 · 3 comments · May be fixed by #97685
Open

Spurious errors emitted for global-scope asm with ThinLTO #61991

Amanieu opened this issue Apr 6, 2023 · 3 comments · May be fixed by #97685
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backend:RISC-V LTO Link time optimization (regular/full LTO or ThinLTO)

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@Amanieu
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Amanieu commented Apr 6, 2023 •
edited by VoltrexKeyva
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test.c

asm("fld f0, 0(sp)");

Output

$ clang test.c -c -target riscv64-unknown-linux-gnu -flto=thin
error: instruction requires the following: 'D' (Double-Precision Floating-Point)
fld f0, 0(sp)
^
error: instruction requires the following: 'D' (Double-Precision Floating-Point)
fld f0, 0(sp)
^

The D feature is enabled by default on riscv64-unknown-linux-gnu, so this error should normally not be emitted.

However compilation still completes successfully (exit code 0) and produces valid LLVM bitcode in test.o.

Similar bug in rustc: rust-lang/rust#80608
@Amanieu Amanieu mentioned this issue Apr 6, 2023
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@EugeneZelenko EugeneZelenko added LTO Link time optimization (regular/full LTO or ThinLTO) and removed new issue labels Apr 6, 2023
@llvmbot
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llvmbot commented Apr 7, 2023

@llvm/issue-subscribers-backend-risc-v

@JohanEngelen JohanEngelen mentioned this issue May 4, 2023
Merged
bob-beck pushed a commit to openbsd/ports that referenced this issue Dec 10, 2023
@jcourreges
Disable LTO on riscv64 to work around an llvm bug
ea1424c 
Upstream issue: llvm/llvm-project#61991

ok jsg@ (maintainer)
@Dirbaio Dirbaio mentioned this issue Jul 3, 2024
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@Dirbaio
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Dirbaio commented Jul 3, 2024

I'm trying to fix this issue and rust-lang/rust#80608 rust-lang/rust#127269 which I believe have the same root cause.

So far I've narrowed it down to here https://github.com/llvm/llvm-project/blob/main/llvm/lib/Object/ModuleSymbolTable.cpp#L96

it creates an ASM parser with empty ("") target features, so parsing the ASM fails. The target requires "+vfp3d16" for target features. I've confirmed if I hardcode that in there the error goes away. However, I don't know what the right fix would be. How can I obtain the target features from there? The module only contains the target triple.

Any hints would be appreciated.

@jamesmunns
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jamesmunns commented Jul 4, 2024 •
edited
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Also noting from the other thread: this appears not JUST to be a RISC-V relevant issue, it's applicable to any target that requires target features. The issue linked in rust-lang/rust#127269 is for an Arm Cortex-R processor.

@chrisnc chrisnc linked a pull request Jul 4, 2024 that will close this issue
Open
chrisnc added a commit to chrisnc/llvm-project that referenced this issue Jul 4, 2024
@chrisnc
[llvm] Fix the MCSubtargetInfo used for module-level assembly.
e434634 
Provide both the default target CPU and default target features from the
module's context, rather than empty strings.

Fixes llvm#61991.
trdthg added a commit to trdthg/WebKit that referenced this issue Nov 10, 2024
@trdthg
[RISCV] Fix instruction requires the following: 'D'|'F'|'M'
e7ca076 
https://bugs.webkit.org/show_bug.cgi?id=282900

Reviewed by NOBODY (OOPS!).

This is a llvm bug, passing `-march=riscv64gc -cpu=lp64d` from clang
will lost after it got llvm side. So we have to set arch here.

More related infomations are here:

- rust-lang/rust#80608
- llvm/llvm-project#61991
- llvm/llvm-project#97685

* Source/JavaScriptCore/assembler/MacroAssemblerRISCV64.cpp:
* Source/JavaScriptCore/llint/LowLevelInterpreter.cpp:
@trdthg trdthg mentioned this issue Nov 10, 2024
Merged
trdthg added a commit to trdthg/WebKit that referenced this issue Nov 10, 2024
@trdthg
[RISCV] Fix instruction requires the following: 'D'|'F'|'M'
97eb199 
https://bugs.webkit.org/show_bug.cgi?id=282900

Reviewed by NOBODY (OOPS!).

This is a llvm bug, passing `-march=riscv64gc -cpu=lp64d` from clang
will lost after it got llvm side. So we have to set arch here.

More related infomations are here:

- rust-lang/rust#80608
- llvm/llvm-project#61991
- llvm/llvm-project#97685

* Source/JavaScriptCore/assembler/MacroAssemblerRISCV64.cpp:
* Source/JavaScriptCore/llint/LowLevelInterpreter.cpp:
trdthg added a commit to trdthg/WebKit that referenced this issue Nov 10, 2024
@trdthg
[RISCV] Fix instruction requires the following: 'D'/'F'/'M'
6ae82b4 
https://bugs.webkit.org/show_bug.cgi?id=282900

Reviewed by NOBODY (OOPS!).

This is a llvm bug, passing `-march=riscv64gc -cpu=lp64d` from clang
will lost after it got llvm side. So we have to set arch here.

More related infomations are here:

- rust-lang/rust#80608
- llvm/llvm-project#61991
- llvm/llvm-project#97685

* Source/JavaScriptCore/assembler/MacroAssemblerRISCV64.cpp:
* Source/JavaScriptCore/llint/LowLevelInterpreter.cpp:
trdthg added a commit to trdthg/WebKit that referenced this issue Nov 11, 2024
@trdthg
[RISCV] Fix instruction requires the following: 'D'/'F'/'M'
57d1228 
https://bugs.webkit.org/show_bug.cgi?id=282900

Reviewed by NOBODY (OOPS!).

This is a llvm bug, passing `-march=riscv64gc -cpu=lp64d` from clang
will lost after it got llvm side. So we have to set arch here.

More related infomations are here:

- rust-lang/rust#80608
- llvm/llvm-project#61991
- llvm/llvm-project#97685

* Source/JavaScriptCore/assembler/MacroAssemblerRISCV64.cpp:
* Source/JavaScriptCore/llint/LowLevelInterpreter.cpp:
webkit-commit-queue pushed a commit to trdthg/WebKit that referenced this issue Nov 19, 2024
@trdthg @Constellation
[RISCV] Fix instruction requires the following: 'D'/'F'/'M'
fff4bd8 
https://bugs.webkit.org/show_bug.cgi?id=282900

Reviewed by Yusuke Suzuki.

This is a llvm bug, passing `-march=riscv64gc -cpu=lp64d` from clang
will lost after it got llvm side. So we have to set arch here.

More related infomations are here:

- rust-lang/rust#80608
- llvm/llvm-project#61991
- llvm/llvm-project#97685

* Source/JavaScriptCore/assembler/MacroAssemblerRISCV64.cpp:
* Source/JavaScriptCore/llint/LowLevelInterpreter.cpp:

Canonical link: https://commits.webkit.org/286815@main
aperezdc pushed a commit to WebKit/WebKit that referenced this issue Dec 15, 2024
@trdthg @aperezdc
Cherry-pick 286815@main (fff4bd8). https://bugs.webkit.org/show_bug.c…
53c63d7 
…gi?id=282900

    [RISCV] Fix instruction requires the following: 'D'/'F'/'M'
    https://bugs.webkit.org/show_bug.cgi?id=282900

    Reviewed by Yusuke Suzuki.

    This is a llvm bug, passing `-march=riscv64gc -cpu=lp64d` from clang
    will lost after it got llvm side. So we have to set arch here.

    More related infomations are here:

    - rust-lang/rust#80608
    - llvm/llvm-project#61991
    - llvm/llvm-project#97685

    * Source/JavaScriptCore/assembler/MacroAssemblerRISCV64.cpp:
    * Source/JavaScriptCore/llint/LowLevelInterpreter.cpp:

    Canonical link: https://commits.webkit.org/286815@main

Canonical link: https://commits.webkit.org/282416.360@webkitglib/2.46
mnutt pushed a commit to movableink/webkit that referenced this issue Dec 23, 2024
@trdthg @mnutt
[RISCV] Fix instruction requires the following: 'D'/'F'/'M'
4fdb5dc 
https://bugs.webkit.org/show_bug.cgi?id=282900

Reviewed by Yusuke Suzuki.

This is a llvm bug, passing `-march=riscv64gc -cpu=lp64d` from clang
will lost after it got llvm side. So we have to set arch here.

More related infomations are here:

- rust-lang/rust#80608
- llvm/llvm-project#61991
- llvm/llvm-project#97685

* Source/JavaScriptCore/assembler/MacroAssemblerRISCV64.cpp:
* Source/JavaScriptCore/llint/LowLevelInterpreter.cpp:

Canonical link: https://commits.webkit.org/286815@main
@Patryk27 Patryk27 mentioned this issue Jan 12, 2025
Open
@eigenform eigenform mentioned this issue Jan 16, 2025
Open
@folkertdev folkertdev mentioned this issue Jan 30, 2025
Open
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[llvm] Fix the MCSubtargetInfo used for module-level assembly. chrisnc/llvm-project
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@nikic @Amanieu @Dirbaio @jamesmunns @EugeneZelenko @llvmbot