llvm assembler does not recognise powerpc paddi, pla, psubi extended mnemonics

[npiggin]

Some Power ISA v3.1 extended mnemonics for paddi including pla, 3-operand form of paddi, and psubi are not recognised by llvm-mc (EDIT: llvm-as -> llvm-mc here and fixed title).

[llvmbot]

@llvm/issue-subscribers-backend-powerpc

[ecnelises]

I guess you mean the native assembler from LLVM, not llvm-as (tool to convert text IR into bitcode IR)? The native assembler (and disassembler) should be llvm-mc.

You can have a look at: https://github.com/llvm/llvm-project/blob/main/llvm/test/MC/PowerPC/ppc64-reloc-directive-pcrel.s and test functionality of llvm-mc.

[npiggin]

Oh, right yes I meant the LLVM assembler.

clang doesn't emit those extended mnemonics when generating pcrel code, but we have some Linux kernel asm code that uses them. Adding one to that test case:

ppc64-reloc-directive-pcrel.S:19:2: error: invalid instruction, did you mean: bla, la, lha, lwa, pld, plha, pli, plwa?
pla 3, vec@got@pcrel
^

(gas does assemble this)

[npiggin]

Ah, it doesn't recognise the 2-operand pld extended mnemonics either. Must be a bunch of things missing.

[stefanp-synopsys]

I've added a patch now that will hopefully cover a whole set of missing Power 10 extended mnemonics.
#73003

[stefanp-synopsys]

The patch has been merged: #73003