[AMDGPU][AsmParser] Refine parsing instructions #62629

kosarev · 2023-05-09T14:14:21Z

This is an umbrella ticket for the work on refining the assembler-related parts of the backend and common LLVM infrastructure. Includes elimination of workarounds, turning custom code into TableGen definitions, simplifications and fixing minor defects found during the work.

32f6b6b [AMDGPU][AsmParser] Refine parsing SDWA operands.
5114843 [AMDGPU][AsmParser] Refine SMRD offset definitions.
32f46ef [AMDGPU][AsmParser][NFC] Refine immediate operand definitions.
b06e5ad [AMDGPU][AsmParser][NFC] Simplify parsing cache policies.
905fa15 [AMDGPU][AsmParser] Distinguish literal and modifier SMEM offsets.
dbbab71 [AMDGPU][NFC] Eliminate the u32imm operand definition.
f0f8ae7 [AMDGPU][AsmParser] Fix matching immediate literals.
3d6b108 [AMDGPU] Remove the unused u8imm operand definition.
ce1aae4 [AMDGPU][AsmParser][NFC] Refine defining single-bit custom operands.
9976127 [AMDGPU][AsmParser][NFC] Refine defining i8- and i16-typed custom operands.
2d945ef [AMDGPU][NFC] Rename GFX10A16 operands.
0a6dc9a [AMDGPU][AsmParser] Refine parsing cache policy modifiers.
536b8c5 [AMDGPU][AsmParser] Remove the now-unused OptionalOperand structure.
fce7a7a [AMDGPU][AsmParser] Refine parsing instruction operands.
926acd2 (arcpatch-D137638) [AMDGPU][AsmParser] Remove extra checks on missing instruction modifiers.
af6b1f7 [AsmParser] Match mandatory operands following optional operands.

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llvmbot · 2023-05-09T14:14:41Z

@llvm/issue-subscribers-backend-amdgpu

Eliminates the need for the custom code in parseCustomOperand(). The remaining uses of NamedOperandU32 are to be addressed separately. Part of <#62629>. Reviewed By: dp Differential Revision: https://reviews.llvm.org/D150204

Eliminates the need for the custom code in parseCustomOperand(). Part of <#62629>. Reviewed By: dp Differential Revision: https://reviews.llvm.org/D150980

…tom operands. Removes unnecessary duplication in TableGen definitions. Part of <#62629>. Reviewed By: dp Differential Revision: https://reviews.llvm.org/D151684

…lasses. Eliminates the need for custom operand classes whose only purpose is to define a parser method. Part of <#62629>. Reviewed By: dp Differential Revision: https://reviews.llvm.org/D151685

Clears the road to eliminating custom default operand handlers. Also unifies naming of related entities. Part of <#62629>. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D151687

Removes the need to add and remove them manually depending on whether they are used in cvt*() functions. Also removes the compiler warnings about unused handlers when it happens to be the case. Part of <#62629>. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D151688

Part of <#62629>. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D152897

Now that we have proper support for optional operands, the standard LLVM machinery can take care of converting parsed instructions to MCInsts. There are likely more cases where the conversion can be done automatically, probably with some additional treatment. The plan is to address them separately. Part of <#62629>. Reviewed By: arsenm, foad Differential Revision: https://reviews.llvm.org/D153565

This addresses the trivial cases that only require removing the operand classes and renaming related entities. Part of <#62629>. Reviewed By: foad Differential Revision: https://reviews.llvm.org/D153965

Also refine the definitions while there. Part of <#62629>. Reviewed By: mbrkusanin Differential Revision: https://reviews.llvm.org/D154061

Simplifies some future changes needed for <#62629>. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D154337

addKImmFPOperands() duplicates the KImmFP-specific logic implemented in addLiteralImmOperand() and therefore can be removed. Part of <#62629>. Reviewed By: foad Differential Revision: https://reviews.llvm.org/D154427

Those are implicit helper operands and therefore don't need any parsers or printers. Part of <#62629>. Reviewed By: piotr, foad Differential Revision: https://reviews.llvm.org/D154432

…omatically. Part of <#62629>. Reviewed By: foad Differential Revision: https://reviews.llvm.org/D154433

Now that we have proper support for optional operands, the standard LLVM machinery can take care of converting parsed instructions to MCInsts. There are likely more cases where the conversion can be done automatically, probably with some additional treatment. The plan is to address them separately. Part of <llvm/llvm-project#62629>. Reviewed By: arsenm, foad Differential Revision: https://reviews.llvm.org/D153565

The patch adds the support for 'noa16' operands in non-A16 variants of the instructions, fixes validation of A16 operands and eliminates the custom conversion to MCInst. Part of <#62629>. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D155057

…s automatically. Part of <#62629>. Reviewed By: foad Differential Revision: https://reviews.llvm.org/D155061

…automatically. Part of <#62629>. Reviewed By: foad Differential Revision: https://reviews.llvm.org/D155620

This includes simplifying printing dmask modifiers where we don't need to mask the value to print. Part of <#62629>.

Knowing just their numeric values is not very helpful. Part of <llvm#62629>.

…102328) Knowing just their numeric values is not very helpful. Part of <#62629>.

Mention the names of unavailable registers in error messages to not make the diagnostics for execz/vccz less rich than it was. Clean up unnecessary name qualifications while there. Part of <llvm#62629>.

There's no need for them to have different types. Part of <llvm#62629>.

…#102616) There's no need for them to have different types. Part of <#62629>.

Mention the names of unavailable registers in error messages to not make the diagnostics for execz/vccz less rich than it was. Clean up unnecessary name qualifications while there. Part of <#62629>.

Eliminates the need for the custom code in parseCustomOperand(). Part of <llvm/llvm-project#62629>. Reviewed By: dp Differential Revision: https://reviews.llvm.org/D150980

Clears the road to eliminating custom default operand handlers. Also unifies naming of related entities. Part of <llvm/llvm-project#62629>. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D151687

Removes the need to add and remove them manually depending on whether they are used in cvt*() functions. Also removes the compiler warnings about unused handlers when it happens to be the case. Part of <llvm/llvm-project#62629>. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D151688

Part of <llvm/llvm-project#62629>. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D152897

Now that we have proper support for optional operands, the standard LLVM machinery can take care of converting parsed instructions to MCInsts. There are likely more cases where the conversion can be done automatically, probably with some additional treatment. The plan is to address them separately. Part of <llvm/llvm-project#62629>. Reviewed By: arsenm, foad Differential Revision: https://reviews.llvm.org/D153565

This addresses the trivial cases that only require removing the operand classes and renaming related entities. Part of <llvm/llvm-project#62629>. Reviewed By: foad Differential Revision: https://reviews.llvm.org/D153965

Also refine the definitions while there. Part of <llvm/llvm-project#62629>. Reviewed By: mbrkusanin Differential Revision: https://reviews.llvm.org/D154061

Simplifies some future changes needed for <llvm/llvm-project#62629>. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D154337

addKImmFPOperands() duplicates the KImmFP-specific logic implemented in addLiteralImmOperand() and therefore can be removed. Part of <llvm/llvm-project#62629>. Reviewed By: foad Differential Revision: https://reviews.llvm.org/D154427

Those are implicit helper operands and therefore don't need any parsers or printers. Part of <llvm/llvm-project#62629>. Reviewed By: piotr, foad Differential Revision: https://reviews.llvm.org/D154432

…omatically. Part of <llvm/llvm-project#62629>. Reviewed By: foad Differential Revision: https://reviews.llvm.org/D154433

The patch adds the support for 'noa16' operands in non-A16 variants of the instructions, fixes validation of A16 operands and eliminates the custom conversion to MCInst. Part of <llvm/llvm-project#62629>. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D155057

…s automatically. Part of <llvm/llvm-project#62629>. Reviewed By: foad Differential Revision: https://reviews.llvm.org/D155061

…automatically. Part of <llvm/llvm-project#62629>. Reviewed By: foad Differential Revision: https://reviews.llvm.org/D155620

kosarev added backend:AMDGPU llvm:asmparser labels May 9, 2023

kosarev self-assigned this May 9, 2023

kosarev added a commit that referenced this issue Jun 15, 2023

[AMDGPU][AsmParser][NFC] Simplify v_interp-related operand definitions.

e95457d

Part of <#62629>. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D152897

kosarev added a commit that referenced this issue Jun 30, 2023

[AMDGPU][AsmParser][NFC] Simplify parsing of sopp_brtarget operands.

b7e8a55

Also refine the definitions while there. Part of <#62629>. Reviewed By: mbrkusanin Differential Revision: https://reviews.llvm.org/D154061

kosarev added a commit that referenced this issue Jul 5, 2023

[AMDGPU] Eliminate SIMCCodeEmitter and de-virtualise encoding methods.

ee165cd

Simplifies some future changes needed for <#62629>. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D154337

kosarev added a commit that referenced this issue Jul 5, 2023

[AMDGPU][AsmParser][NFC] Generate printers for named-bit operands aut…

7208fde

…omatically. Part of <#62629>. Reviewed By: foad Differential Revision: https://reviews.llvm.org/D154433

kosarev added a commit that referenced this issue Jul 13, 2023

[AMDGPU][AsmParser][NFC] Translate parsed MIMG instructions to MCInst…

7b6e606

…s automatically. Part of <#62629>. Reviewed By: foad Differential Revision: https://reviews.llvm.org/D155061

kosarev added a commit that referenced this issue Jul 19, 2023

[AMDGPU][AsmParser][NFC] Translate parsed DS instructions to MCInsts …

6b693f5

…automatically. Part of <#62629>. Reviewed By: foad Differential Revision: https://reviews.llvm.org/D155620

This was referenced Oct 16, 2023

[AMDGPU][AsmParser] Eliminate custom predicates for named-bit operands. #69243

Merged

[AMDGPU][AsmParser] Some instructions are indistinguishable to AsmParser #69256

Open

kosarev added a commit that referenced this issue Jul 29, 2024

[AMDGPU] Use a generic printer for NamedIntOperands. (#100399)

5bd3aef

This includes simplifying printing dmask modifiers where we don't need to mask the value to print. Part of <#62629>.

kosarev added a commit to kosarev/llvm-project that referenced this issue Aug 7, 2024

[AMDGPU][AsmParser] Print names of parsed registers in debug output.

30942c5

Knowing just their numeric values is not very helpful. Part of <llvm#62629>.

kosarev mentioned this issue Aug 7, 2024

[AMDGPU][AsmParser] Print names of parsed registers in debug output. #102328

Merged

kosarev added a commit that referenced this issue Aug 8, 2024

[AMDGPU][AsmParser] Print names of parsed registers in debug output. (#…

15dacb4

…102328) Knowing just their numeric values is not very helpful. Part of <#62629>.

kosarev mentioned this issue Aug 9, 2024

[AMDGPU][AsmParser] Eliminate validateExeczVcczOperands(). #102600

Merged

kosarev added a commit to kosarev/llvm-project that referenced this issue Aug 9, 2024

[AMDGPU][AsmParser][NFCI] All NamedIntOperands to be of the i32 type.

c82926e

There's no need for them to have different types. Part of <llvm#62629>.

kosarev mentioned this issue Aug 9, 2024

[AMDGPU][AsmParser][NFCI] All NamedIntOperands to be of the i32 type. #102616

Merged

kosarev added a commit that referenced this issue Aug 9, 2024

[AMDGPU][AsmParser][NFCI] All NamedIntOperands to be of the i32 type. (…

335bc3c

…#102616) There's no need for them to have different types. Part of <#62629>.

veselypeta pushed a commit to veselypeta/cherillvm that referenced this issue Aug 28, 2024

[AMDGPU][AsmParser][NFC] Simplify v_interp-related operand definitions.

d78fdf8

Part of <llvm/llvm-project#62629>. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D152897

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[AMDGPU][AsmParser] Refine parsing instructions #62629

[AMDGPU][AsmParser] Refine parsing instructions #62629

kosarev commented May 9, 2023

llvmbot commented May 9, 2023

[AMDGPU][AsmParser] Refine parsing instructions #62629

[AMDGPU][AsmParser] Refine parsing instructions #62629

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kosarev commented May 9, 2023

llvmbot commented May 9, 2023