aarch64: prfm is not treated as an alias to prfum

[pinskia]

Forwarded from https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99092 when building GCC with LLVM's assembler.
But can be reproduced with an inline-asm as simple as:

void f(void)
{
        asm("prfm    PLDL1KEEP, [x0, #-8]");
}

My analysis of why this is a LLVM assembler issue can be found at https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99092#c9 .
The ARM folks specifically wanted to output pfrm from GCC too:
https://gcc.gnu.org/legacy-ml/gcc-patches/2014-07/msg00612.html

When it comes to emitting the pattern, always use "prfm" -- the prfum
form can be generated from the prfm mnemonic when the offset implies
this is necessary.

So I suspect this should be accepted by the LLVM assembler also.

[llvmbot]

@llvm/issue-subscribers-backend-aarch64

Author: Andrew Pinski (pinskia)

Details

Forwarded from https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99092 when building GCC with LLVM's assembler. But can be reproduced with an inline-asm as simple as: ``` void f(void) { asm("prfm PLDL1KEEP, [x0, #-8]"); } ```

My analysis of why this is a LLVM assembler issue can be found at https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99092#c9 .
The ARM folks specifically wanted to output pfrm from GCC too:
https://gcc.gnu.org/legacy-ml/gcc-patches/2014-07/msg00612.html

When it comes to emitting the pattern, always use "prfm" -- the prfum
form can be generated from the prfm mnemonic when the offset implies
this is necessary.

So I suspect this should be accepted by the LLVM assembler also.

[pinskia]

Just add a quick note here.

The documentation for prfm has the following note on it:

For information about memory accesses, see Load/Store addressing modes.

and that section documents the acceptable addressing modes (and even has:

Some types of load/store instruction support only a subset of the load/store addressing modes listed in Table C1-7
on page C1-248.

)

This is why I think LLVM's assembler should accept PRFM as an alias to PRFUM .