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[SPARC][IAS] Add v8plus feature bit #101367

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Aug 2, 2024
Merged

[SPARC][IAS] Add v8plus feature bit #101367

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3e6323a
[SPARC] Add v8plus feature bit
koachan Jul 31, 2024
1da748c
Only emit EM_SPARC32PLUS objects on explicit request
koachan Aug 1, 2024
3db1a6d
Adjust code after rebasing
koachan Aug 2, 2024
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13 changes: 13 additions & 0 deletions llvm/include/llvm/BinaryFormat/ELF.h
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Expand Up @@ -697,6 +697,19 @@ enum {
#include "ELFRelocs/SystemZ.def"
};

// SPARC Specific e_flags
enum : unsigned {
EF_SPARC_EXT_MASK = 0xffff00,
EF_SPARC_32PLUS = 0x000100,
EF_SPARC_SUN_US1 = 0x000200,
EF_SPARC_HAL_R1 = 0x000400,
EF_SPARC_SUN_US3 = 0x000800,
EF_SPARCV9_MM = 0x3,
EF_SPARCV9_TSO = 0x0,
EF_SPARCV9_PSO = 0x1,
EF_SPARCV9_RMO = 0x2,
};
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Ah I didn't realize this enum doesn't exist.
It will need to be supported in llvm-readobj etc., probably in separate PR.

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Mhm, I think it's better to do that in separate PRs, just like with clang.


// ELF Relocation type for Sparc.
enum {
#include "ELFRelocs/Sparc.def"
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6 changes: 3 additions & 3 deletions llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
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Expand Up @@ -132,15 +132,15 @@ namespace {
class SparcAsmBackend : public MCAsmBackend {
protected:
bool Is64Bit;
bool HasV9;
bool IsV8Plus;

public:
SparcAsmBackend(const MCSubtargetInfo &STI)
: MCAsmBackend(STI.getTargetTriple().isLittleEndian()
? llvm::endianness::little
: llvm::endianness::big),
Is64Bit(STI.getTargetTriple().isArch64Bit()),
HasV9(STI.hasFeature(Sparc::FeatureV9)) {}
IsV8Plus(STI.hasFeature(Sparc::FeatureV8Plus)) {}

unsigned getNumFixupKinds() const override {
return Sparc::NumTargetFixupKinds;
Expand Down Expand Up @@ -359,7 +359,7 @@ namespace {
std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const override {
uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(OSType);
return createSparcELFObjectWriter(Is64Bit, HasV9, OSABI);
return createSparcELFObjectWriter(Is64Bit, IsV8Plus, OSABI);
}
};

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8 changes: 4 additions & 4 deletions llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
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Expand Up @@ -21,11 +21,11 @@ using namespace llvm;
namespace {
class SparcELFObjectWriter : public MCELFObjectTargetWriter {
public:
SparcELFObjectWriter(bool Is64Bit, bool HasV9, uint8_t OSABI)
SparcELFObjectWriter(bool Is64Bit, bool IsV8Plus, uint8_t OSABI)
: MCELFObjectTargetWriter(
Is64Bit, OSABI,
Is64Bit ? ELF::EM_SPARCV9
: (HasV9 ? ELF::EM_SPARC32PLUS : ELF::EM_SPARC),
: (IsV8Plus ? ELF::EM_SPARC32PLUS : ELF::EM_SPARC),
/*HasRelocationAddend*/ true) {}

~SparcELFObjectWriter() override = default;
Expand Down Expand Up @@ -148,6 +148,6 @@ bool SparcELFObjectWriter::needsRelocateWithSymbol(const MCValue &,
}

std::unique_ptr<MCObjectTargetWriter>
llvm::createSparcELFObjectWriter(bool Is64Bit, bool HasV9, uint8_t OSABI) {
return std::make_unique<SparcELFObjectWriter>(Is64Bit, HasV9, OSABI);
llvm::createSparcELFObjectWriter(bool Is64Bit, bool IsV8Plus, uint8_t OSABI) {
return std::make_unique<SparcELFObjectWriter>(Is64Bit, IsV8Plus, OSABI);
}
2 changes: 1 addition & 1 deletion llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
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Expand Up @@ -86,7 +86,7 @@ createSparcMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) {

static MCTargetStreamer *
createObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI) {
return new SparcTargetELFStreamer(S);
return new SparcTargetELFStreamer(S, STI);
}

static MCTargetStreamer *createTargetAsmStreamer(MCStreamer &S,
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2 changes: 1 addition & 1 deletion llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.h
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Expand Up @@ -35,7 +35,7 @@ MCAsmBackend *createSparcAsmBackend(const Target &T, const MCSubtargetInfo &STI,
const MCRegisterInfo &MRI,
const MCTargetOptions &Options);
std::unique_ptr<MCObjectTargetWriter>
createSparcELFObjectWriter(bool Is64Bit, bool HasV9, uint8_t OSABI);
createSparcELFObjectWriter(bool Is64Bit, bool IsV8Plus, uint8_t OSABI);

// Defines symbolic names for Sparc v9 ASI tag names.
namespace SparcASITag {
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25 changes: 23 additions & 2 deletions llvm/lib/Target/Sparc/MCTargetDesc/SparcTargetStreamer.cpp
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Expand Up @@ -12,11 +12,24 @@

#include "SparcTargetStreamer.h"
#include "SparcInstPrinter.h"
#include "SparcMCTargetDesc.h"
#include "llvm/BinaryFormat/ELF.h"
#include "llvm/MC/MCELFObjectWriter.h"
#include "llvm/MC/MCRegister.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/FormattedStream.h"

using namespace llvm;

static unsigned getEFlagsForFeatureSet(const MCSubtargetInfo &STI) {
unsigned EFlags = 0;

if (STI.hasFeature(Sparc::FeatureV8Plus))
EFlags |= ELF::EF_SPARC_32PLUS;

return EFlags;
}

// pin vtable to this file
SparcTargetStreamer::SparcTargetStreamer(MCStreamer &S) : MCTargetStreamer(S) {}

Expand All @@ -38,8 +51,16 @@ void SparcTargetAsmStreamer::emitSparcRegisterScratch(unsigned reg) {
<< ", #scratch\n";
}

SparcTargetELFStreamer::SparcTargetELFStreamer(MCStreamer &S)
: SparcTargetStreamer(S) {}
SparcTargetELFStreamer::SparcTargetELFStreamer(MCStreamer &S,
const MCSubtargetInfo &STI)
: SparcTargetStreamer(S) {
ELFObjectWriter &W = getStreamer().getWriter();
unsigned EFlags = W.getELFHeaderEFlags();

EFlags |= getEFlagsForFeatureSet(STI);

W.setELFHeaderEFlags(EFlags);
}

MCELFStreamer &SparcTargetELFStreamer::getStreamer() {
return static_cast<MCELFStreamer &>(Streamer);
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2 changes: 1 addition & 1 deletion llvm/lib/Target/Sparc/MCTargetDesc/SparcTargetStreamer.h
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Expand Up @@ -40,7 +40,7 @@ class SparcTargetAsmStreamer : public SparcTargetStreamer {
// This part is for ELF object output
class SparcTargetELFStreamer : public SparcTargetStreamer {
public:
SparcTargetELFStreamer(MCStreamer &S);
SparcTargetELFStreamer(MCStreamer &S, const MCSubtargetInfo &STI);
MCELFStreamer &getStreamer();
void emitSparcRegisterIgnore(unsigned reg) override {}
void emitSparcRegisterScratch(unsigned reg) override {}
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3 changes: 3 additions & 0 deletions llvm/lib/Target/Sparc/Sparc.td
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Expand Up @@ -34,6 +34,9 @@ def FeatureNoFMULS
def FeatureV9
: SubtargetFeature<"v9", "IsV9", "true",
"Enable SPARC-V9 instructions">;
def FeatureV8Plus
: SubtargetFeature<"v8plus", "IsV8Plus", "true",
"Enable V8+ mode, allowing use of 64-bit V9 instructions in 32-bit code">;
def FeatureV8Deprecated
: SubtargetFeature<"deprecated-v8", "UseV8DeprecatedInsts", "true",
"Enable deprecated V8 instructions in V9 mode">;
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8 changes: 4 additions & 4 deletions llvm/test/MC/Sparc/elf-sparc-machine-type.s
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@@ -1,11 +1,11 @@
## Emit correct machine type depending on triple and cpu options.
## - `-triple sparc` emits an object of type EM_SPARC;
## - `-triple sparc -mcpu=v9` emits EM_SPARC32PLUS; and
## - `-triple sparc -mattr=+v8plus` emits EM_SPARC32PLUS; and
## - `-triple sparcv9` emits EM_SPARCV9.

# RUN: llvm-mc -filetype=obj -triple sparc %s -o - | llvm-readobj -h - | FileCheck --check-prefixes=SPARC %s
# RUN: llvm-mc -filetype=obj -triple sparc -mcpu=v9 %s -o - | llvm-readobj -h - | FileCheck --check-prefixes=SPARC32PLUS %s
# RUN: llvm-mc -filetype=obj -triple sparcv9 %s -o - | llvm-readobj -h - | FileCheck --check-prefixes=SPARCV9 %s
# RUN: llvm-mc -filetype=obj -triple sparc %s -o - | llvm-readobj -h - | FileCheck --check-prefixes=SPARC %s
# RUN: llvm-mc -filetype=obj -triple sparc -mattr=+v8plus %s -o - | llvm-readobj -h - | FileCheck --check-prefixes=SPARC32PLUS %s
# RUN: llvm-mc -filetype=obj -triple sparcv9 %s -o - | llvm-readobj -h - | FileCheck --check-prefixes=SPARCV9 %s

# SPARC: Machine: EM_SPARC (0x2)
# SPARC32PLUS: Machine: EM_SPARC32PLUS (0x12)
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