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[LLVM] Slay undead copysign code #111269

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[LLVM] Slay undead copysign code #111269

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7745181
[PowerPC] regenerate ctrloop-cpsgn.ll test
workingjubilee Nov 1, 2024
5aaacd7
[CodeGen] Demand llvm.copysign.f{16,32,64,80,128} lowers without libc…
workingjubilee Nov 1, 2024
e277a8e
[SelectionDAG] Only lower COPYSIGN_PPC_F128 to copysignl
workingjubilee Oct 5, 2024
5fd0d86
[PowerPC][SelectionDAG] Expand `@llvm.copysign.ppc_fp128` without cop…
workingjubilee Oct 12, 2024
bd017cc
[PowerPC][SelectionDAG] Use SETUEQ in copysign expansion
workingjubilee Oct 29, 2024
2ddf2ef
[PowerPC] Erase now-irrelevant test
workingjubilee Nov 1, 2024
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5 changes: 0 additions & 5 deletions llvm/include/llvm/IR/RuntimeLibcalls.def
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Original file line number Diff line number Diff line change
Expand Up @@ -289,11 +289,6 @@ HANDLE_LIBCALL(FLOOR_F64, "floor")
HANDLE_LIBCALL(FLOOR_F80, "floorl")
HANDLE_LIBCALL(FLOOR_F128, "floorl")
HANDLE_LIBCALL(FLOOR_PPCF128, "floorl")
HANDLE_LIBCALL(COPYSIGN_F32, "copysignf")
HANDLE_LIBCALL(COPYSIGN_F64, "copysign")
HANDLE_LIBCALL(COPYSIGN_F80, "copysignl")
HANDLE_LIBCALL(COPYSIGN_F128, "copysignl")
HANDLE_LIBCALL(COPYSIGN_PPCF128, "copysignl")
HANDLE_LIBCALL(FMIN_F32, "fminf")
HANDLE_LIBCALL(FMIN_F64, "fmin")
HANDLE_LIBCALL(FMIN_F80, "fminl")
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4 changes: 0 additions & 4 deletions llvm/lib/CodeGen/IntrinsicLowering.cpp
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Expand Up @@ -437,10 +437,6 @@ void IntrinsicLowering::LowerIntrinsicCall(CallInst *CI) {
ReplaceFPIntrinsicWithCall(CI, "roundevenf", "roundeven", "roundevenl");
break;
}
case Intrinsic::copysign: {
ReplaceFPIntrinsicWithCall(CI, "copysignf", "copysign", "copysignl");
break;
}
case Intrinsic::get_rounding:
// Lower to "round to the nearest"
if (!CI->getType()->isVoidTy())
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19 changes: 13 additions & 6 deletions llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
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Expand Up @@ -1709,12 +1709,19 @@ void DAGTypeLegalizer::ExpandFloatRes_FCEIL(SDNode *N,

void DAGTypeLegalizer::ExpandFloatRes_FCOPYSIGN(SDNode *N,
SDValue &Lo, SDValue &Hi) {
ExpandFloatRes_Binary(N, GetFPLibCall(N->getValueType(0),
RTLIB::COPYSIGN_F32,
RTLIB::COPYSIGN_F64,
RTLIB::COPYSIGN_F80,
RTLIB::COPYSIGN_F128,
RTLIB::COPYSIGN_PPCF128), Lo, Hi);

assert(N->getValueType(0) == MVT::ppcf128 &&
"Logic only correct for ppcf128!");
SDLoc DL = SDLoc(N);
SDValue Tmp = SDValue();
Comment on lines +1715 to +1716
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Suggested change
SDLoc DL = SDLoc(N);
SDValue Tmp = SDValue();
SDLoc DL(N);
SDValue Tmp;

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The LLVM style guide specifically said I should "Use auto Type Deduction to Make Code More Readable". So I did. Then I was advised to not. So I accepted that.

But I find these changes make the code significantly harder to read.

Are you aware of another programming language that implements this... most vexing constructor form?

GetExpandedFloat(N->getOperand(0), Lo, Tmp);

Hi = DAG.getNode(ISD::FCOPYSIGN, DL, Tmp.getValueType(), Tmp,
N->getOperand(1));
// A double-double is Hi + Lo, so if Hi flips sign, so must Lo
Lo = DAG.getSelectCC(DL, Tmp, Hi, Lo,
DAG.getNode(ISD::FNEG, DL, Lo.getValueType(), Lo),
ISD::SETUEQ);
}

void DAGTypeLegalizer::ExpandFloatRes_FCOS(SDNode *N,
Expand Down
1 change: 0 additions & 1 deletion llvm/lib/IR/RuntimeLibcalls.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -62,7 +62,6 @@ void RuntimeLibcallsInfo::initLibcalls(const Triple &TT) {
setLibcallName(RTLIB::ROUND_F128, "roundf128");
setLibcallName(RTLIB::ROUNDEVEN_F128, "roundevenf128");
setLibcallName(RTLIB::FLOOR_F128, "floorf128");
setLibcallName(RTLIB::COPYSIGN_F128, "copysignf128");
setLibcallName(RTLIB::FMIN_F128, "fminf128");
setLibcallName(RTLIB::FMAX_F128, "fmaxf128");
setLibcallName(RTLIB::LROUND_F128, "lroundf128");
Expand Down
3 changes: 0 additions & 3 deletions llvm/lib/Target/SystemZ/ZOSLibcallNames.def
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Expand Up @@ -87,9 +87,6 @@ HANDLE_LIBCALL(EXP2_F128, "@@LXP2@B")
HANDLE_LIBCALL(COS_F64, "@@SCOS@B")
HANDLE_LIBCALL(COS_F32, "@@FCOS@B")
HANDLE_LIBCALL(COS_F128, "@@LCOS@B")
HANDLE_LIBCALL(COPYSIGN_F64, "@@DCPY@B")
HANDLE_LIBCALL(COPYSIGN_F32, "@@FCPY@B")
HANDLE_LIBCALL(COPYSIGN_F128, "@@LCPY@B")
HANDLE_LIBCALL(CEIL_F64, "@@SCEL@B")
HANDLE_LIBCALL(CEIL_F32, "@@FCEL@B")
HANDLE_LIBCALL(CEIL_F128, "@@LCEL@B")
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3 changes: 0 additions & 3 deletions llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -264,9 +264,6 @@ struct RuntimeLibcallSignatureTable {
Table[RTLIB::FLOOR_F32] = f32_func_f32;
Table[RTLIB::FLOOR_F64] = f64_func_f64;
Table[RTLIB::FLOOR_F128] = i64_i64_func_i64_i64;
Table[RTLIB::COPYSIGN_F32] = f32_func_f32_f32;
Table[RTLIB::COPYSIGN_F64] = f64_func_f64_f64;
Table[RTLIB::COPYSIGN_F128] = i64_i64_func_i64_i64_i64_i64;
Table[RTLIB::FMIN_F32] = f32_func_f32_f32;
Table[RTLIB::FMIN_F64] = f64_func_f64_f64;
Table[RTLIB::FMIN_F128] = i64_i64_func_i64_i64_i64_i64;
Expand Down
108 changes: 48 additions & 60 deletions llvm/test/CodeGen/PowerPC/copysignl.ll
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Expand Up @@ -43,31 +43,27 @@ declare double @copysign(double, double) #0
define ppc_fp128 @foo_ll(double %a, ppc_fp128 %b) #0 {
; CHECK-LABEL: foo_ll:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr 0
; CHECK-NEXT: stdu 1, -112(1)
; CHECK-NEXT: fmr 3, 2
; CHECK-NEXT: addis 3, 2, .LCPI2_0@toc@ha
; CHECK-NEXT: std 0, 128(1)
; CHECK-NEXT: lfs 2, .LCPI2_0@toc@l(3)
; CHECK-NEXT: bl copysignl
; CHECK-NEXT: nop
; CHECK-NEXT: addi 1, 1, 112
; CHECK-NEXT: ld 0, 16(1)
; CHECK-NEXT: mtlr 0
; CHECK-NEXT: fcpsgn 0, 2, 1
; CHECK-NEXT: li 3, 8
; CHECK-NEXT: addis 4, 2, .LCPI2_0@toc@ha
; CHECK-NEXT: addi 4, 4, .LCPI2_0@toc@l
; CHECK-NEXT: fcmpu 0, 1, 0
; CHECK-NEXT: fmr 1, 0
; CHECK-NEXT: crnor 20, 2, 3
; CHECK-NEXT: isel 3, 0, 3, 20
; CHECK-NEXT: lfdx 2, 4, 3
; CHECK-NEXT: blr
;
; CHECK-VSX-LABEL: foo_ll:
; CHECK-VSX: # %bb.0: # %entry
; CHECK-VSX-NEXT: mflr 0
; CHECK-VSX-NEXT: stdu 1, -112(1)
; CHECK-VSX-NEXT: fmr 3, 2
; CHECK-VSX-NEXT: fmr 0, 1
; CHECK-VSX-NEXT: xscpsgndp 1, 2, 1
; CHECK-VSX-NEXT: xxlxor 2, 2, 2
; CHECK-VSX-NEXT: std 0, 128(1)
; CHECK-VSX-NEXT: bl copysignl
; CHECK-VSX-NEXT: nop
; CHECK-VSX-NEXT: addi 1, 1, 112
; CHECK-VSX-NEXT: ld 0, 16(1)
; CHECK-VSX-NEXT: mtlr 0
; CHECK-VSX-NEXT: fcmpu 0, 0, 1
; CHECK-VSX-NEXT: cror 20, 2, 3
; CHECK-VSX-NEXT: bclr 12, 20, 0
; CHECK-VSX-NEXT: # %bb.1: # %entry
; CHECK-VSX-NEXT: xsnegdp 2, 2
; CHECK-VSX-NEXT: blr
entry:
%conv = fpext double %a to ppc_fp128
Expand All @@ -78,31 +74,27 @@ entry:
define ppc_fp128 @foo_ld(double %a, double %b) #0 {
; CHECK-LABEL: foo_ld:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr 0
; CHECK-NEXT: stdu 1, -112(1)
; CHECK-NEXT: fmr 3, 2
; CHECK-NEXT: addis 3, 2, .LCPI3_0@toc@ha
; CHECK-NEXT: std 0, 128(1)
; CHECK-NEXT: lfs 2, .LCPI3_0@toc@l(3)
; CHECK-NEXT: bl copysignl
; CHECK-NEXT: nop
; CHECK-NEXT: addi 1, 1, 112
; CHECK-NEXT: ld 0, 16(1)
; CHECK-NEXT: mtlr 0
; CHECK-NEXT: fcpsgn 0, 2, 1
; CHECK-NEXT: li 3, 8
; CHECK-NEXT: addis 4, 2, .LCPI3_0@toc@ha
; CHECK-NEXT: addi 4, 4, .LCPI3_0@toc@l
; CHECK-NEXT: fcmpu 0, 1, 0
; CHECK-NEXT: fmr 1, 0
; CHECK-NEXT: crnor 20, 2, 3
; CHECK-NEXT: isel 3, 0, 3, 20
; CHECK-NEXT: lfdx 2, 4, 3
; CHECK-NEXT: blr
;
; CHECK-VSX-LABEL: foo_ld:
; CHECK-VSX: # %bb.0: # %entry
; CHECK-VSX-NEXT: mflr 0
; CHECK-VSX-NEXT: stdu 1, -112(1)
; CHECK-VSX-NEXT: fmr 3, 2
; CHECK-VSX-NEXT: fmr 0, 1
; CHECK-VSX-NEXT: xscpsgndp 1, 2, 1
; CHECK-VSX-NEXT: xxlxor 2, 2, 2
; CHECK-VSX-NEXT: std 0, 128(1)
; CHECK-VSX-NEXT: bl copysignl
; CHECK-VSX-NEXT: nop
; CHECK-VSX-NEXT: addi 1, 1, 112
; CHECK-VSX-NEXT: ld 0, 16(1)
; CHECK-VSX-NEXT: mtlr 0
; CHECK-VSX-NEXT: fcmpu 0, 0, 1
; CHECK-VSX-NEXT: cror 20, 2, 3
; CHECK-VSX-NEXT: bclr 12, 20, 0
; CHECK-VSX-NEXT: # %bb.1: # %entry
; CHECK-VSX-NEXT: xsnegdp 2, 2
; CHECK-VSX-NEXT: blr
entry:
%conv = fpext double %a to ppc_fp128
Expand All @@ -114,31 +106,27 @@ entry:
define ppc_fp128 @foo_lf(double %a, float %b) #0 {
; CHECK-LABEL: foo_lf:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr 0
; CHECK-NEXT: stdu 1, -112(1)
; CHECK-NEXT: fmr 3, 2
; CHECK-NEXT: addis 3, 2, .LCPI4_0@toc@ha
; CHECK-NEXT: std 0, 128(1)
; CHECK-NEXT: lfs 2, .LCPI4_0@toc@l(3)
; CHECK-NEXT: bl copysignl
; CHECK-NEXT: nop
; CHECK-NEXT: addi 1, 1, 112
; CHECK-NEXT: ld 0, 16(1)
; CHECK-NEXT: mtlr 0
; CHECK-NEXT: fcpsgn 0, 2, 1
; CHECK-NEXT: li 3, 8
; CHECK-NEXT: addis 4, 2, .LCPI4_0@toc@ha
; CHECK-NEXT: addi 4, 4, .LCPI4_0@toc@l
; CHECK-NEXT: fcmpu 0, 1, 0
; CHECK-NEXT: fmr 1, 0
; CHECK-NEXT: crnor 20, 2, 3
; CHECK-NEXT: isel 3, 0, 3, 20
; CHECK-NEXT: lfdx 2, 4, 3
; CHECK-NEXT: blr
;
; CHECK-VSX-LABEL: foo_lf:
; CHECK-VSX: # %bb.0: # %entry
; CHECK-VSX-NEXT: mflr 0
; CHECK-VSX-NEXT: stdu 1, -112(1)
; CHECK-VSX-NEXT: fmr 3, 2
; CHECK-VSX-NEXT: fmr 0, 1
; CHECK-VSX-NEXT: fcpsgn 1, 2, 1
; CHECK-VSX-NEXT: xxlxor 2, 2, 2
; CHECK-VSX-NEXT: std 0, 128(1)
; CHECK-VSX-NEXT: bl copysignl
; CHECK-VSX-NEXT: nop
; CHECK-VSX-NEXT: addi 1, 1, 112
; CHECK-VSX-NEXT: ld 0, 16(1)
; CHECK-VSX-NEXT: mtlr 0
; CHECK-VSX-NEXT: fcmpu 0, 0, 1
; CHECK-VSX-NEXT: cror 20, 2, 3
; CHECK-VSX-NEXT: bclr 12, 20, 0
; CHECK-VSX-NEXT: # %bb.1: # %entry
; CHECK-VSX-NEXT: xsnegdp 2, 2
; CHECK-VSX-NEXT: blr
entry:
%conv = fpext double %a to ppc_fp128
Expand Down
28 changes: 0 additions & 28 deletions llvm/test/CodeGen/PowerPC/ctrloop-cpsgn.ll
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