[AMDGPU][True16][MC] Copy True16Predicate from pseudo to real in VOP1 #116098
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@llvm/pr-subscribers-mc Author: Joe Nash (Sisyph) ChangesThis is a necessary change for consistency and an upcoming patch. Cleanup an affected extra whitespace and wrong CHECK prefix in v_swap_b16. Full diff: https://github.com/llvm/llvm-project/pull/116098.diff 3 Files Affected:
diff --git a/llvm/lib/Target/AMDGPU/VOP1Instructions.td b/llvm/lib/Target/AMDGPU/VOP1Instructions.td
index 6b50ed95931765..4d550644504a7e 100644
--- a/llvm/lib/Target/AMDGPU/VOP1Instructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP1Instructions.td
@@ -76,6 +76,7 @@ class VOP1_Real <VOP1_Pseudo ps, int EncodingFamily, string real_name = ps.Mnemo
// copy relevant pseudo op flags
let SubtargetPredicate = ps.SubtargetPredicate;
let OtherPredicates = ps.OtherPredicates;
+ let True16Predicate = ps.True16Predicate;
let AsmMatchConverter = ps.AsmMatchConverter;
let AsmVariantName = ps.AsmVariantName;
let Constraints = ps.Constraints;
@@ -735,7 +736,7 @@ def VOP_SWAP_I16 : VOPProfile_True16<VOP_I16_I16> {
VOPSrcEncodedDstOperand_t16Lo128:$vdst1);
let Ins32 = (ins VOPSrcEncodedDstOperand_t16Lo128:$src0,
VOPDstOperand_t16Lo128:$src1);
- let Asm32 = " $vdst, $src0";
+ let Asm32 = "$vdst, $src0";
}
let SubtargetPredicate = isGFX11Plus in {
diff --git a/llvm/test/MC/AMDGPU/gfx12_asm_vop1.s b/llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
index e897d01aac7916..b9ee13dcad6e77 100644
--- a/llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
+++ b/llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
@@ -3555,13 +3555,13 @@ v_sqrt_f64 v[254:255], 0xaf123456
// GFX12: v_sqrt_f64_e32 v[254:255], 0xaf123456 ; encoding: [0xff,0x68,0xfc,0x7f,0x56,0x34,0x12,0xaf]
v_swap_b16 v5.l, v1.h
-// GFX12: v_swap_b16 v5.l, v1.h ; encoding: [0x81,0xcd,0x0a,0x7e]
+// GFX12: v_swap_b16 v5.l, v1.h ; encoding: [0x81,0xcd,0x0a,0x7e]
v_swap_b16 v5.h, v1.l
-// GFX12: v_swap_b16 v5.h, v1.l ; encoding: [0x01,0xcd,0x0a,0x7f]
+// GFX12: v_swap_b16 v5.h, v1.l ; encoding: [0x01,0xcd,0x0a,0x7f]
v_swap_b16 v127.l, v127.l
-// GFX12: v_swap_b16 v127.l, v127.l ; encoding: [0x7f,0xcd,0xfe,0x7e]
+// GFX12: v_swap_b16 v127.l, v127.l ; encoding: [0x7f,0xcd,0xfe,0x7e]
v_swap_b32 v5, v1
// GFX12: v_swap_b32 v5, v1 ; encoding: [0x01,0xcb,0x0a,0x7e]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt
index ec44cf9ad12923..fc96cff9a6c655 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt
@@ -3499,10 +3499,10 @@
# GFX11: v_sqrt_f64_e32 v[254:255], 0xaf123456 ; encoding: [0xff,0x68,0xfc,0x7f,0x56,0x34,0x12,0xaf]
0xff,0x68,0xfc,0x7f,0x56,0x34,0x12,0xaf
-# GFX11-TRUE16: v_swap_b16 v5.l, v1.h ; encoding: [0x81,0xcd,0x0a,0x7e]
+# GFX11-REAL16: v_swap_b16 v5.l, v1.h ; encoding: [0x81,0xcd,0x0a,0x7e]
0x81,0xcd,0x0a,0x7e
-# GFX11-TRUE16: v_swap_b16 v5.h, v1.l ; encoding: [0x01,0xcd,0x0a,0x7f]
+# GFX11-REAL16: v_swap_b16 v5.h, v1.l ; encoding: [0x01,0xcd,0x0a,0x7f]
0x01,0xcd,0x0a,0x7f
# GFX11: v_swap_b32 v5, v1 ; encoding: [0x01,0xcb,0x0a,0x7e]
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@llvm/pr-subscribers-backend-amdgpu Author: Joe Nash (Sisyph) ChangesThis is a necessary change for consistency and an upcoming patch. Cleanup an affected extra whitespace and wrong CHECK prefix in v_swap_b16. Full diff: https://github.com/llvm/llvm-project/pull/116098.diff 3 Files Affected:
diff --git a/llvm/lib/Target/AMDGPU/VOP1Instructions.td b/llvm/lib/Target/AMDGPU/VOP1Instructions.td
index 6b50ed95931765..4d550644504a7e 100644
--- a/llvm/lib/Target/AMDGPU/VOP1Instructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP1Instructions.td
@@ -76,6 +76,7 @@ class VOP1_Real <VOP1_Pseudo ps, int EncodingFamily, string real_name = ps.Mnemo
// copy relevant pseudo op flags
let SubtargetPredicate = ps.SubtargetPredicate;
let OtherPredicates = ps.OtherPredicates;
+ let True16Predicate = ps.True16Predicate;
let AsmMatchConverter = ps.AsmMatchConverter;
let AsmVariantName = ps.AsmVariantName;
let Constraints = ps.Constraints;
@@ -735,7 +736,7 @@ def VOP_SWAP_I16 : VOPProfile_True16<VOP_I16_I16> {
VOPSrcEncodedDstOperand_t16Lo128:$vdst1);
let Ins32 = (ins VOPSrcEncodedDstOperand_t16Lo128:$src0,
VOPDstOperand_t16Lo128:$src1);
- let Asm32 = " $vdst, $src0";
+ let Asm32 = "$vdst, $src0";
}
let SubtargetPredicate = isGFX11Plus in {
diff --git a/llvm/test/MC/AMDGPU/gfx12_asm_vop1.s b/llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
index e897d01aac7916..b9ee13dcad6e77 100644
--- a/llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
+++ b/llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
@@ -3555,13 +3555,13 @@ v_sqrt_f64 v[254:255], 0xaf123456
// GFX12: v_sqrt_f64_e32 v[254:255], 0xaf123456 ; encoding: [0xff,0x68,0xfc,0x7f,0x56,0x34,0x12,0xaf]
v_swap_b16 v5.l, v1.h
-// GFX12: v_swap_b16 v5.l, v1.h ; encoding: [0x81,0xcd,0x0a,0x7e]
+// GFX12: v_swap_b16 v5.l, v1.h ; encoding: [0x81,0xcd,0x0a,0x7e]
v_swap_b16 v5.h, v1.l
-// GFX12: v_swap_b16 v5.h, v1.l ; encoding: [0x01,0xcd,0x0a,0x7f]
+// GFX12: v_swap_b16 v5.h, v1.l ; encoding: [0x01,0xcd,0x0a,0x7f]
v_swap_b16 v127.l, v127.l
-// GFX12: v_swap_b16 v127.l, v127.l ; encoding: [0x7f,0xcd,0xfe,0x7e]
+// GFX12: v_swap_b16 v127.l, v127.l ; encoding: [0x7f,0xcd,0xfe,0x7e]
v_swap_b32 v5, v1
// GFX12: v_swap_b32 v5, v1 ; encoding: [0x01,0xcb,0x0a,0x7e]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt
index ec44cf9ad12923..fc96cff9a6c655 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt
@@ -3499,10 +3499,10 @@
# GFX11: v_sqrt_f64_e32 v[254:255], 0xaf123456 ; encoding: [0xff,0x68,0xfc,0x7f,0x56,0x34,0x12,0xaf]
0xff,0x68,0xfc,0x7f,0x56,0x34,0x12,0xaf
-# GFX11-TRUE16: v_swap_b16 v5.l, v1.h ; encoding: [0x81,0xcd,0x0a,0x7e]
+# GFX11-REAL16: v_swap_b16 v5.l, v1.h ; encoding: [0x81,0xcd,0x0a,0x7e]
0x81,0xcd,0x0a,0x7e
-# GFX11-TRUE16: v_swap_b16 v5.h, v1.l ; encoding: [0x01,0xcd,0x0a,0x7f]
+# GFX11-REAL16: v_swap_b16 v5.h, v1.l ; encoding: [0x01,0xcd,0x0a,0x7f]
0x01,0xcd,0x0a,0x7f
# GFX11: v_swap_b32 v5, v1 ; encoding: [0x01,0xcb,0x0a,0x7e]
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arsenm
approved these changes
Nov 13, 2024
This is a necessary change for consistency and an upcoming patch. Cleanup an affected extra whitespace and wrong CHECK prefix in v_swap_b16.
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This is a necessary change for consistency and an upcoming patch. Cleanup an affected extra whitespace and wrong CHECK prefix in v_swap_b16.