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[SPARC][IAS] Properly set implied feature sets for ISA levels/extensions #143232

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[SPARC][IAS] Properly set implied feature sets for ISA levels/extensions #143232

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e0d2634
[SPARC][IAS] Make Is64Bit imply FeatureV9 in the assembler
koachan Jun 7, 2025
492495d
Apply suggestions for error checks
koachan Jun 8, 2025
995cc68
Also add implied featureset for other ISA extensions
koachan Jun 8, 2025
58154ca
Apply feedback on tests
koachan Jun 15, 2025
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18 changes: 12 additions & 6 deletions llvm/lib/Target/Sparc/Sparc.td
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Original file line number Diff line number Diff line change
Expand Up @@ -42,22 +42,28 @@ def FeatureV8Deprecated
"Enable deprecated V8 instructions in V9 mode">;
def FeatureVIS
: SubtargetFeature<"vis", "IsVIS", "true",
"Enable UltraSPARC Visual Instruction Set extensions">;
"Enable UltraSPARC Visual Instruction Set extensions",
[FeatureV9]>;
def FeatureVIS2
: SubtargetFeature<"vis2", "IsVIS2", "true",
"Enable Visual Instruction Set extensions II">;
"Enable Visual Instruction Set extensions II",
[FeatureV9]>;
def FeatureVIS3
: SubtargetFeature<"vis3", "IsVIS3", "true",
"Enable Visual Instruction Set extensions III">;
"Enable Visual Instruction Set extensions III",
[FeatureV9]>;
def FeatureUA2005
: SubtargetFeature<"ua2005", "IsUA2005", "true",
"Enable UltraSPARC Architecture 2005 extensions">;
"Enable UltraSPARC Architecture 2005 extensions",
[FeatureV9, FeatureVIS, FeatureVIS2]>;
def FeatureUA2007
: SubtargetFeature<"ua2007", "IsUA2007", "true",
"Enable UltraSPARC Architecture 2007 extensions">;
"Enable UltraSPARC Architecture 2007 extensions",
[FeatureV9, FeatureVIS, FeatureVIS2]>;
def FeatureOSA2011
: SubtargetFeature<"osa2011", "IsOSA2011", "true",
"Enable Oracle SPARC Architecture 2011 extensions">;
"Enable Oracle SPARC Architecture 2011 extensions",
[FeatureV9, FeatureVIS, FeatureVIS2, FeatureVIS3]>;
def FeatureLeon
: SubtargetFeature<"leon", "IsLeon", "true",
"Enable LEON extensions">;
Expand Down
3 changes: 2 additions & 1 deletion llvm/lib/Target/Sparc/SparcInstrInfo.td
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Expand Up @@ -24,7 +24,8 @@ include "SparcInstrFormats.td"
def Is32Bit : Predicate<"!Subtarget->is64Bit()">;

// True when generating 64-bit code. This also implies HasV9.
def Is64Bit : Predicate<"Subtarget->is64Bit()">;
def Is64Bit : Predicate<"Subtarget->is64Bit()">,
AssemblerPredicate<(all_of FeatureV9)>;

def UseSoftMulDiv : Predicate<"Subtarget->useSoftMulDiv()">,
AssemblerPredicate<(all_of FeatureSoftMulDiv)>;
Expand Down
42 changes: 16 additions & 26 deletions llvm/test/CodeGen/SPARC/ctlz.ll
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Expand Up @@ -207,20 +207,15 @@ define i64 @i64_nopoison(i64 %x) nounwind {
;
; SPARC-VIS3-LABEL: i64_nopoison:
; SPARC-VIS3: ! %bb.0:
; SPARC-VIS3-NEXT: srl %o0, 0, %o2
; SPARC-VIS3-NEXT: lzcnt %o2, %o2
; SPARC-VIS3-NEXT: add %o2, -32, %o2
; SPARC-VIS3-NEXT: srl %o1, 0, %o1
; SPARC-VIS3-NEXT: lzcnt %o1, %o1
; SPARC-VIS3-NEXT: add %o1, -32, %o1
; SPARC-VIS3-NEXT: add %o1, 32, %o1
; SPARC-VIS3-NEXT: cmp %o0, 0
; SPARC-VIS3-NEXT: bne .LBB2_2
; SPARC-VIS3-NEXT: nop
; SPARC-VIS3-NEXT: ! %bb.1:
; SPARC-VIS3-NEXT: srl %o1, 0, %o0
; SPARC-VIS3-NEXT: lzcnt %o0, %o0
; SPARC-VIS3-NEXT: add %o0, -32, %o0
; SPARC-VIS3-NEXT: add %o0, 32, %o1
; SPARC-VIS3-NEXT: retl
; SPARC-VIS3-NEXT: mov %g0, %o0
; SPARC-VIS3-NEXT: .LBB2_2:
; SPARC-VIS3-NEXT: srl %o0, 0, %o0
; SPARC-VIS3-NEXT: lzcnt %o0, %o0
; SPARC-VIS3-NEXT: add %o0, -32, %o1
; SPARC-VIS3-NEXT: movne %icc, %o2, %o1
; SPARC-VIS3-NEXT: retl
; SPARC-VIS3-NEXT: mov %g0, %o0
;
Expand Down Expand Up @@ -311,20 +306,15 @@ define i64 @i64_poison(i64 %x) nounwind {
;
; SPARC-VIS3-LABEL: i64_poison:
; SPARC-VIS3: ! %bb.0:
; SPARC-VIS3-NEXT: srl %o0, 0, %o2
; SPARC-VIS3-NEXT: lzcnt %o2, %o2
; SPARC-VIS3-NEXT: add %o2, -32, %o2
; SPARC-VIS3-NEXT: srl %o1, 0, %o1
; SPARC-VIS3-NEXT: lzcnt %o1, %o1
; SPARC-VIS3-NEXT: add %o1, -32, %o1
; SPARC-VIS3-NEXT: add %o1, 32, %o1
; SPARC-VIS3-NEXT: cmp %o0, 0
; SPARC-VIS3-NEXT: bne .LBB3_2
; SPARC-VIS3-NEXT: nop
; SPARC-VIS3-NEXT: ! %bb.1:
; SPARC-VIS3-NEXT: srl %o1, 0, %o0
; SPARC-VIS3-NEXT: lzcnt %o0, %o0
; SPARC-VIS3-NEXT: add %o0, -32, %o0
; SPARC-VIS3-NEXT: add %o0, 32, %o1
; SPARC-VIS3-NEXT: retl
; SPARC-VIS3-NEXT: mov %g0, %o0
; SPARC-VIS3-NEXT: .LBB3_2:
; SPARC-VIS3-NEXT: srl %o0, 0, %o0
; SPARC-VIS3-NEXT: lzcnt %o0, %o0
; SPARC-VIS3-NEXT: add %o0, -32, %o1
; SPARC-VIS3-NEXT: movne %icc, %o2, %o1
; SPARC-VIS3-NEXT: retl
; SPARC-VIS3-NEXT: mov %g0, %o0
;
Expand Down
46 changes: 20 additions & 26 deletions llvm/test/CodeGen/SPARC/cttz.ll
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Expand Up @@ -254,28 +254,25 @@ define i64 @i64_nopoison(i64 %x) nounwind {
;
; SPARC-VIS3-LABEL: i64_nopoison:
; SPARC-VIS3: ! %bb.0:
; SPARC-VIS3-NEXT: cmp %o1, 0
; SPARC-VIS3-NEXT: bne .LBB2_2
; SPARC-VIS3-NEXT: nop
; SPARC-VIS3-NEXT: ! %bb.1:
; SPARC-VIS3-NEXT: add %o0, -1, %o1
; SPARC-VIS3-NEXT: andn %o1, %o0, %o0
; SPARC-VIS3-NEXT: add %o0, -1, %o2
; SPARC-VIS3-NEXT: andn %o2, %o0, %o0
; SPARC-VIS3-NEXT: srl %o0, 0, %o0
; SPARC-VIS3-NEXT: lzcnt %o0, %o0
; SPARC-VIS3-NEXT: add %o0, -32, %o0
; SPARC-VIS3-NEXT: ba .LBB2_3
; SPARC-VIS3-NEXT: mov 64, %o1
; SPARC-VIS3-NEXT: .LBB2_2:
; SPARC-VIS3-NEXT: mov 64, %o2
; SPARC-VIS3-NEXT: sub %o2, %o0, %o2
; SPARC-VIS3-NEXT: add %o1, -1, %o0
; SPARC-VIS3-NEXT: andn %o0, %o1, %o0
; SPARC-VIS3-NEXT: srl %o0, 0, %o0
; SPARC-VIS3-NEXT: lzcnt %o0, %o0
; SPARC-VIS3-NEXT: add %o0, -32, %o0
; SPARC-VIS3-NEXT: mov 32, %o1
; SPARC-VIS3-NEXT: .LBB2_3:
; SPARC-VIS3-NEXT: sub %o1, %o0, %o1
; SPARC-VIS3-NEXT: retl
; SPARC-VIS3-NEXT: mov 32, %o3
; SPARC-VIS3-NEXT: sub %o3, %o0, %o0
; SPARC-VIS3-NEXT: cmp %o1, 0
; SPARC-VIS3-NEXT: movne %icc, %o0, %o2
; SPARC-VIS3-NEXT: mov %g0, %o0
; SPARC-VIS3-NEXT: retl
; SPARC-VIS3-NEXT: mov %o2, %o1
;
; SPARC64-LABEL: i64_nopoison:
; SPARC64: ! %bb.0:
Expand Down Expand Up @@ -376,28 +373,25 @@ define i64 @i64_poison(i64 %x) nounwind {
;
; SPARC-VIS3-LABEL: i64_poison:
; SPARC-VIS3: ! %bb.0:
; SPARC-VIS3-NEXT: cmp %o1, 0
; SPARC-VIS3-NEXT: bne .LBB3_2
; SPARC-VIS3-NEXT: nop
; SPARC-VIS3-NEXT: ! %bb.1:
; SPARC-VIS3-NEXT: add %o0, -1, %o1
; SPARC-VIS3-NEXT: andn %o1, %o0, %o0
; SPARC-VIS3-NEXT: add %o0, -1, %o2
; SPARC-VIS3-NEXT: andn %o2, %o0, %o0
; SPARC-VIS3-NEXT: srl %o0, 0, %o0
; SPARC-VIS3-NEXT: lzcnt %o0, %o0
; SPARC-VIS3-NEXT: add %o0, -32, %o0
; SPARC-VIS3-NEXT: ba .LBB3_3
; SPARC-VIS3-NEXT: mov 64, %o1
; SPARC-VIS3-NEXT: .LBB3_2:
; SPARC-VIS3-NEXT: mov 64, %o2
; SPARC-VIS3-NEXT: sub %o2, %o0, %o2
; SPARC-VIS3-NEXT: add %o1, -1, %o0
; SPARC-VIS3-NEXT: andn %o0, %o1, %o0
; SPARC-VIS3-NEXT: srl %o0, 0, %o0
; SPARC-VIS3-NEXT: lzcnt %o0, %o0
; SPARC-VIS3-NEXT: add %o0, -32, %o0
; SPARC-VIS3-NEXT: mov 32, %o1
; SPARC-VIS3-NEXT: .LBB3_3:
; SPARC-VIS3-NEXT: sub %o1, %o0, %o1
; SPARC-VIS3-NEXT: retl
; SPARC-VIS3-NEXT: mov 32, %o3
; SPARC-VIS3-NEXT: sub %o3, %o0, %o0
; SPARC-VIS3-NEXT: cmp %o1, 0
; SPARC-VIS3-NEXT: movne %icc, %o0, %o2
; SPARC-VIS3-NEXT: mov %g0, %o0
; SPARC-VIS3-NEXT: retl
; SPARC-VIS3-NEXT: mov %o2, %o1
;
; SPARC64-LABEL: i64_poison:
; SPARC64: ! %bb.0:
Expand Down
9 changes: 9 additions & 0 deletions llvm/test/CodeGen/SPARC/inlineasm-v9.ll
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Expand Up @@ -58,3 +58,12 @@ Entry:
tail call void asm sideeffect "", "{o0}"(i64 %val)
ret void
}

; CHECK-LABEL: test_twinword:
; CHECK: rd %pc, %i1
; CHECK: srlx %i1, 32, %i0

define i64 @test_twinword(){
%1 = tail call i64 asm sideeffect "rd %asr5, ${0:L} \0A\09 srlx ${0:L}, 32, ${0:H}", "={i0}"()
ret i64 %1
}
9 changes: 0 additions & 9 deletions llvm/test/CodeGen/SPARC/inlineasm.ll
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Expand Up @@ -144,15 +144,6 @@ entry:
ret void
}

; CHECK-LABEL: test_twinword:
; CHECK: rd %asr5, %i1
; CHECK: srlx %i1, 32, %i0

define i64 @test_twinword(){
%1 = tail call i64 asm sideeffect "rd %asr5, ${0:L} \0A\09 srlx ${0:L}, 32, ${0:H}", "={i0}"()
ret i64 %1
}

; CHECK-LABEL: test_symbol:
; CHECK: ba,a brtarget
define void @test_symbol() {
Expand Down
77 changes: 41 additions & 36 deletions llvm/test/MC/Sparc/Relocations/relocation-specifier.s
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@@ -1,20 +1,21 @@
# RUN: llvm-mc %s -triple=sparc | FileCheck %s --check-prefix=ASM
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@MaskRay MaskRay Jun 11, 2025 •
edited
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It's usually easier to maintain to test different ISAs with the same test file.
You can use

--check-prefixes=OBJDUMP,OBJDUMP-V8
--check-prefixes=OBJDUMP,OBJDUMP-V9

If some code only works with v9, .ifdef V9 ... .endif and --defsym V9=1

# RUN: llvm-mc %s -triple=sparcv9 | FileCheck %s --check-prefix=ASM
# RUN: llvm-mc %s --defsym V9=1 -triple=sparcv9 | FileCheck %s --check-prefixes=ASM,ASM-V9

# RUN: llvm-mc %s -triple=sparc -filetype=obj -o %t
# RUN: llvm-objdump -dr %t | FileCheck %s --check-prefix=OBJDUMP
# RUN: llvm-mc %s -triple=sparcv9 -filetype=obj -o %t
# RUN: llvm-objdump -dr %t | FileCheck %s --check-prefix=OBJDUMP
# RUN: llvm-readelf -s - < %t | FileCheck %s --check-prefix=READELF --implicit-check-not=TLS
# RUN: llvm-mc %s --defsym V9=1 -triple=sparcv9 -filetype=obj -o %t
# RUN: llvm-objdump -dr %t | FileCheck %s --check-prefixes=OBJDUMP,OBJDUMP-V9
# RUN: llvm-readelf -s - < %t | FileCheck %s --check-prefixes=READELF,READELF-V9 --implicit-check-not=TLS

# READELF: TLS LOCAL DEFAULT [[#]] s_tle_hix22
# READELF: TLS LOCAL DEFAULT [[#]] s_tldo_hix22
# READELF: TLS GLOBAL DEFAULT UND s_tle_lox10
# READELF: TLS GLOBAL DEFAULT UND s_tie_hi22
# READELF: TLS GLOBAL DEFAULT UND s_tie_lo10
# READELF: TLS GLOBAL DEFAULT UND s_tie_ld
# READELF: TLS GLOBAL DEFAULT UND s_tie_ldx
# READELF: TLS GLOBAL DEFAULT UND s_tie_add
# READELF-V9: TLS GLOBAL DEFAULT UND s_tie_hi22
# READELF-V9: TLS GLOBAL DEFAULT UND s_tie_lo10
# READELF-V9: TLS GLOBAL DEFAULT UND s_tie_ld
# READELF-V9: TLS GLOBAL DEFAULT UND s_tie_ldx
# READELF-V9: TLS GLOBAL DEFAULT UND s_tie_add
# READELF: TLS GLOBAL DEFAULT UND s_tldm_hi22
# READELF: TLS GLOBAL DEFAULT UND s_tldm_lo10
# READELF: TLS GLOBAL DEFAULT UND s_tldm_add
Expand Down Expand Up @@ -72,30 +73,32 @@ or %g1, %hm(sym), %g3
or %g1, %ulo(sym), %g3
sethi %lm(sym), %l0

# ASM: sethi %hix(sym), %g1
# ASM-NEXT: xor %g1, %lox(sym), %g1
# ASM-NEXT: sethi %gdop_hix22(sym), %l1
# ASM-NEXT: or %l1, %gdop_lox10(sym), %l1
# ASM-NEXT: ldx [%l7+%l1], %l2, %gdop(sym)
# OBJDUMP: sethi 0x3fffff, %g0
# OBJDUMP-NEXT: xor %g0, -0x400, %g0
# OBJDUMP-NEXT: sethi 0x0, %g1
# OBJDUMP-NEXT: R_SPARC_HIX22 sym
# OBJDUMP-NEXT: xor %g1, 0x0, %g1
# OBJDUMP-NEXT: R_SPARC_LOX10 sym
# OBJDUMP-NEXT: sethi 0x0, %l1
# OBJDUMP-NEXT: R_SPARC_GOTDATA_OP_HIX22 sym
# OBJDUMP-NEXT: or %l1, 0x0, %l1
# OBJDUMP-NEXT: R_SPARC_GOTDATA_OP_LOX10 sym
# OBJDUMP-NEXT: ldx [%l7+%l1], %l2
# OBJDUMP-NEXT: R_SPARC_GOTDATA_OP sym
.ifdef V9
# ASM-V9: sethi %hix(sym), %g1
# ASM-V9-NEXT: xor %g1, %lox(sym), %g1
# ASM-V9-NEXT: sethi %gdop_hix22(sym), %l1
# ASM-V9-NEXT: or %l1, %gdop_lox10(sym), %l1
# ASM-V9-NEXT: ldx [%l7+%l1], %l2, %gdop(sym)
# OBJDUMP-V9: sethi 0x3fffff, %g0
# OBJDUMP-V9-NEXT: xor %g0, -0x400, %g0
# OBJDUMP-V9-NEXT: sethi 0x0, %g1
# OBJDUMP-V9-NEXT: R_SPARC_HIX22 sym
# OBJDUMP-V9-NEXT: xor %g1, 0x0, %g1
# OBJDUMP-V9-NEXT: R_SPARC_LOX10 sym
# OBJDUMP-V9-NEXT: sethi 0x0, %l1
# OBJDUMP-V9-NEXT: R_SPARC_GOTDATA_OP_HIX22 sym
# OBJDUMP-V9-NEXT: or %l1, 0x0, %l1
# OBJDUMP-V9-NEXT: R_SPARC_GOTDATA_OP_LOX10 sym
# OBJDUMP-V9-NEXT: ldx [%l7+%l1], %l2
# OBJDUMP-V9-NEXT: R_SPARC_GOTDATA_OP sym
sethi %hix(zero), %g0
xor %g0, %lox(zero), %g0
sethi %hix(sym), %g1
xor %g1, %lox(sym), %g1
sethi %gdop_hix22(sym), %l1
or %l1, %gdop_lox10(sym), %l1
ldx [%l7 + %l1], %l2, %gdop(sym)
.endif

.set abs, 0xfedcba98
.set abs48, 0xfedcba987654
Expand Down Expand Up @@ -147,23 +150,25 @@ xor %o0, %lox(abs), %o0
sethi %tle_hix22(s_tle_hix22), %i0
xor %i0, %tle_lox10(s_tle_lox10), %i0

.ifdef V9
## Initial Executable model
# ASM: sethi %tie_hi22(s_tie_hi22), %i1
# ASM-NEXT: add %i1, %tie_lo10(s_tie_lo10), %i1
# ASM-NEXT: ld [%i0+%i1], %i0, %tie_ld(s_tie_ld)
# ASM-NEXT: ldx [%i0+%i1], %i0, %tie_ldx(s_tie_ldx)
# ASM-NEXT: add %g7, %i0, %o0, %tie_add(s_tie_add)

# OBJDUMP: R_SPARC_TLS_IE_HI22 s_tie_hi22
# OBJDUMP: R_SPARC_TLS_IE_LO10 s_tie_lo10
# OBJDUMP: R_SPARC_TLS_IE_LD s_tie_ld
# OBJDUMP: R_SPARC_TLS_IE_LDX s_tie_ldx
# OBJDUMP: R_SPARC_TLS_IE_ADD s_tie_add
# ASM-V9: sethi %tie_hi22(s_tie_hi22), %i1
# ASM-V9-NEXT: add %i1, %tie_lo10(s_tie_lo10), %i1
# ASM-V9-NEXT: ld [%i0+%i1], %i0, %tie_ld(s_tie_ld)
# ASM-V9-NEXT: ldx [%i0+%i1], %i0, %tie_ldx(s_tie_ldx)
# ASM-V9-NEXT: add %g7, %i0, %o0, %tie_add(s_tie_add)

# OBJDUMP-V9: R_SPARC_TLS_IE_HI22 s_tie_hi22
# OBJDUMP-V9: R_SPARC_TLS_IE_LO10 s_tie_lo10
# OBJDUMP-V9: R_SPARC_TLS_IE_LD s_tie_ld
# OBJDUMP-V9: R_SPARC_TLS_IE_LDX s_tie_ldx
# OBJDUMP-V9: R_SPARC_TLS_IE_ADD s_tie_add
sethi %tie_hi22(s_tie_hi22), %i1
add %i1, %tie_lo10(s_tie_lo10), %i1
ld [%i0+%i1], %i0, %tie_ld(s_tie_ld)
ldx [%i0+%i1], %i0, %tie_ldx(s_tie_ldx)
add %g7, %i0, %o0, %tie_add(s_tie_add)
.endif

## Local Dynamic model
# ASM: sethi %tldo_hix22(s_tldo_hix22), %i1
Expand Down
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